C8051F321-GM Silicon Laboratories Inc, C8051F321-GM Datasheet - Page 190

• Manufacturer Part Number: C8051F321-GM
• Description: IC 8051 MCU 16K FLASH 28MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F321-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 21
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2.25 KB
• Interface Type: I2C/SMBus/SPI/UART/USB
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F320DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit or 17-ch x 10-bit
• No. Of I/o's: 21
• Ram Memory Size: 1280Byte
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1480 - DAUGHTER CARD TOOLSTCK C8051F321770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1449 - ADAPTER PROGRAM TOOLSTICK F321336-1260 - DEV KIT FOR C8051F320/F321
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1261

C8051F320/1
16.5.4. Slave Transmitter Mode
Serial data is transmitted on SDA and the clock is received on SCL. When slave events are enabled (INH = 0), the
interface enters Slave Receiver Mode (to receive the slave address) when a START followed by a slave address and
direction bit (READ in this case) is received. Upon entering Slave Transmitter Mode, an interrupt is generated and
the ACKRQ bit is set. Software responds to the received slave address with an ACK, or ignores the received slave
address with a NACK. If the received slave address is ignored, slave interrupts will be inhibited until a START is
detected. If the received slave address is acknowledged, data should be written to SMB0DAT to be transmitted. The
interface enters Slave Transmitter Mode, and transmits one or more bytes of data. After each byte is transmitted, the
master sends an acknowledge bit; if the acknowledge bit is an ACK, SMB0DAT should be written with the next data
byte. If the acknowledge bit is a NACK, SMB0DAT should not be written to before SI is cleared (Note: an error con-
dition may be generated if SMB0DAT is written following a received NACK while in Slave Transmitter Mode). The
interface exits Slave Transmitter Mode after receiving a STOP. Note that the interface will switch to Slave Receiver
Mode if SMB0DAT is not written following a Slave Transmitter interrupt. Figure 16.11 shows a typical Slave Trans-
mitter sequence. Two transmitted data bytes are shown, though any number of bytes may be transmitted. Notice that
the ‘data byte transferred’ interrupts occur after the ACK cycle in this mode.
190
S
Received by SMBus
Interface
Transmitted by
SMBus Interface
SLA
Figure 16.11. Typical Slave Transmitter Sequence
Interrupt
R
A
Data Byte
Rev. 1.1
Interrupt
A
S = START
P = STOP
N = NACK
R = READ
SLA = Slave Address
Data Byte
Interrupt
N
Interrupt
P