C8051F321-GM Silicon Laboratories Inc, C8051F321-GM Datasheet - Page 85

IC 8051 MCU 16K FLASH 28MLP

C8051F321-GM

Manufacturer Part Number
C8051F321-GM
Description
IC 8051 MCU 16K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheets

Specifications of C8051F321-GM

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2.25 KB
Interface Type
I2C/SMBus/SPI/UART/USB
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
21
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F320DK
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit or 17-ch x 10-bit
No. Of I/o's
21
Ram Memory Size
1280Byte
Cpu Speed
25MHz
No. Of Timers
4
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1480 - DAUGHTER CARD TOOLSTCK C8051F321770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1449 - ADAPTER PROGRAM TOOLSTICK F321336-1260 - DEV KIT FOR C8051F320/F321
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1261

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Bits7-0:
Bit7:
Bit6:
Bit5:
Bits4-3:
Bit2:
Bit1:
Bit0:
R/W
R/W
Bit7
CY
Bit7
SP: Stack Pointer.
The Stack Pointer holds the location of the top of the stack. The stack pointer is incremented before
every PUSH operation. The SP register defaults to 0x07 after reset.
CY: Carry Flag.
This bit is set when the last arithmetic operation resulted in a carry (addition) or a borrow (subtrac-
tion). It is cleared to logic 0 by all other arithmetic operations.
AC: Auxiliary Carry Flag
This bit is set when the last arithmetic operation resulted in a carry into (addition) or a borrow from
(subtraction) the high order nibble. It is cleared to logic 0 by all other arithmetic operations.
F0: User Flag 0.
This is a bit-addressable, general purpose flag for use under software control.
RS1-RS0: Register Bank Select.
These bits select which register bank is used during register accesses.
OV: Overflow Flag.
This bit is set to 1 under the following circumstances:
• An ADD, ADDC, or SUBB instruction causes a sign-change overflow.
• A MUL instruction results in an overflow (result is greater than 255).
• A DIV instruction causes a divide-by-zero condition.
The OV bit is cleared to 0 by the ADD, ADDC, SUBB, MUL, and DIV instructions in all other cases.
F1: User Flag 1.
This is a bit-addressable, general purpose flag for use under software control.
PARITY: Parity Flag.
This bit is set to logic 1 if the sum of the eight bits in the accumulator is odd and cleared if the sum is
even.
RS1
0
0
1
1
R/W
R/W
AC
Bit6
Bit6
RS0
0
1
0
1
R/W
R/W
Bit5
Bit5
F0
Figure 9.6. PSW: Program Status Word
Register Bank
Figure 9.5. SP: Stack Pointer
RS1
R/W
R/W
Bit4
Bit4
0
1
2
3
RS0
R/W
R/W
Bit3
Bit3
0x08 - 0x0F
0x18 - 0x1F
0x00 - 0x07
0x10 - 0x17
Rev. 1.1
Address
R/W
R/W
OV
Bit2
Bit2
R/W
R/W
Bit1
Bit1
F1
(bit addressable)
C8051F320/1
PARITY
R/W
Bit0
Bit0
R
SFR Address:
SFR Address:
00000000
00000111
Reset Value
Reset Value
0xD0
0x81
85

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