HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 347

• Manufacturer Part Number: HD64F3687GFPV
• Description: IC H8 MCU FLASH 56K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3687GFPV

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 45
• Program Memory Size: 56KB (56K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• Package: 64LQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 45
• Interface Type: I2C/SCI
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• For Use With: R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.3.5
ICSR performs confirmation of interrupt request flags and status.
Bit
7
6
5
Bit Name
TDRE
TEND
RDRF
I
2
C Bus Status Register (ICSR)
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
Transmit Data Register Empty
[Setting conditions]
[Clearing conditions]
Transmit End
[Setting conditions]
[Clearing conditions]
Receive Data Register Full
[Setting condition]
[Clearing conditions]
When data is transferred from ICDRT to ICDRS and
ICDRT becomes empty
When TRS is set
When a start condition (including re-transfer) has
been issued
When transmit mode is entered from receive mode in
slave mode
When 0 is written in TDRE after reading TDRE = 1
When data is written to ICDRT with an instruction
When the ninth clock of SCL rises with the I
format while the TDRE flag is 1
When the final bit of transmit frame is sent with the
clock synchronous serial format
When 0 is written in TEND after reading TEND = 1
When data is written to ICDRT with an instruction
When a receive data is transferred from ICDRS to
ICDRR
When 0 is written in RDRF after reading RDRF = 1
When ICDRR is read with an instruction
Rev.5.00 Nov. 02, 2005 Page 313 of 500
Section 17 I
2
C Bus Interface 2 (IIC2)
REJ09B0027-0500
2
C bus