HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 225

IC H8/SLP MCU FLASH 80QFP

HD64F38024DV

Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
The section initialization routine (_INITSCT), provided as the standard library, operates similarly
to the program shown below.
static const struct DSEC{
};
static const struct BSEC{
};
static void clearblock(void *b_top, void *b_end);
static void copyblock (void *d_top, void *d_end, void *r_top);
#ifdef _ _cplusplus
extern “c”
#endif
void _INITSCT(void)
{
}
static void clearblock(void *b_top, void *b_end)
{
}
static void copyblock(void *d_top, void *d_end, void *r_top)
{
}
void * rom_s;
void * rom_e;
void * ram_s;
void * b_s;
void * b_e;
const struct BSEC *btbl;
const struct DSEC *dtbl;
for( btbl =_ _sectop (“C$BSEC”);
for( dtbl =_ _sectop (“C$DSEC”);
char *p;
for( p=b_top; p<(char *)b_end; p++)
char *p, *q;
for( p=r_top, q=d_top; q<(char *)d_end; p++, q++)
clearblock( btbl->b_s, btbl->b_e );
copyblock( dtbl->rom_s, dtbl->rom_e, dtbl->ram_s );
*p = 0;
*p = *q;
btbl <(struct BSEC *)_ _secend (“C$BSEC”); btbl++)
dtbl <(struct DSEC *)_ _secend (“C$DSEC”); dtbl++)
// Copies the initialized data from ROM to RAM
// Initialization table struct for D defined in previous example
// Start address member of the initialization data section in ROM
// End address member of the initialization data section in ROM
// Start address member of initialization data section in RAM
// Initialization table struct for B defined in previous example
// Start address member of uninitialized data section
// End address member of uninitialized data section
// Linked to C
// Section initialization routine
// Initialization table structure for section B
// Initialization table structure for section D
// Initializes the uninitialized data section
// Initializes the initialized data section
// Initializes the uninitialized data section by 0
// Copies the initialized data from ROM to RAM
211

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