HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 31

• Manufacturer Part Number: HD64F38024DV
• Description: IC H8/SLP MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300L SLPr

Specifications of HD64F38024DV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SCI
• Peripherals: LCD, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 2.3
Operation
unsigned short
unsigned long ul;
unsigned short
unsigned short us;
Note: The intermediate 4-byte result of a multiplication of two 2-byte data is used as it is if the
us1,us2,us3;
us=us1*us2/us3;
us1,us2;
ul=us1*us2;
cpuexpand=V6 is valid only when the CPU type is H8S and legacy=v4 has been specified or
CPU type is H8/300 and H8/300H.
result is assigned to or converted to a 4-byte object, or is divided by a 2-byte divisor.
cpuexpand Option Specifications
cpuexpand Is Specified
The intermediate result is held
as unsigned long.*
Output example:
4-byte result of us1*us2 is
assigned to ul.
The intermediate result is held
as unsigned long.*
Output example:
4-byte result of us1*us2 is
used as the dividend.
MOV.W
MOV.W
MULXU.W Rs,ERd
MOV.L
MOV.W
MOV.W
MULXU.W Rs,ERd
MOV.W
DIVXU.W Rs,ERd
MOV.W
Operation Size of us1*us2 (for H8S/2600)
@_us1,Rd
@_us2,Rs
ERd,@_ul
@_us1,Rd
@_us2,Rs
@_us3,Rs
Rd,@_us
nocpuexpand Is Specified
Calculated as unsigned short.
Output example:
Low-order two bytes of us1*us2 result are
zero-extended and assigned to ul.
Calculated as unsigned short.
Output example:
Low-order two bytes of us1*us2 result are
zero-extended and used as the dividend.
MOV.W
MOV.W
MULXU.W Rs,ERd
EXTU.L
MOV.L
MOV.W
MOV.W
MULXU.W Rs,ERd
EXTU.L
MOV.W
DIVXU.W Rs,ERd
MOV.W
@_us1,Rd
@_us2,Rs
ERd
ERd,@_ul
@_us1,Rd
@_us2,Rs
ERd
@_us3,Rs
Rd,@_us
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