HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 298

IC H8/SLP MCU FLASH 80QFP

HD64F38024DV

Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(7) Registers
Table 10.9 Register Specifications
No.
1
2
Notes: 1. If the noregexpansion option is specified, no register variable is assigned to the
284
Item
Registers to which register variables
assigned
Types of register variables
assigned to registers
2. If the H8/300-series CPU is selected as the CPU, variables these of types be assigned
3. If the H8/300-series CPU is selected as the CPU, structure data of 2 bytes or less
4. Only if the H8SX-series and H8S CPU is selected as the CPU, register variable(s) can
5. Allocation of a variable to a register is not affected by the register storage-class
register in the parentheses, ( ).
to the register.
can be assigned.
be assigned to ER6 even without optimization.
specifier. If the enable_register option is specified, however, variables for which the
register-storage class has been declared will be preferentially assigned to registers.
*5
that can be
*5
can be
Compiler Specifications
H8/300
Others
char, unsigned char,
short, unsigned short,
int, unsigned int,
long
float
pointer to data member,
structure data of 4 bytes or less
*2
*2
, unsigned long
, pointer, reference,
Optimization: (R3)
Optimization: (ER3)
No optimization: (R3)
ER6
No optimization: (ER3)
ER5, ER6
*4
*2
,
*1
, R4, R5, R6
*1
, ER4, ER5,
*1
*3
, R4, R5
*1
, ER4,

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