HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 969

IC H8/SLP MCU FLASH 80QFP

HD64F38024DV

Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
g. Optimization Improvement by optimize=variable_access
h. Optimization Improvement by optimize=register
i. Optimization Improvement of Assembly Programs
j. Debugging Information Deletion
k. Debugging Information Compression
2. Added and Improved Functions in Upgrade from Ver. 7.0 to Ver. 8.0
a. Support for New CPU
b. Output to Empty Area
c. Specifying Memory Size Used
d. Specifying 8-bit Absolute Area Address
e. Changing Error Level for Overlapping Section Addresses
Variables allocated in a 16-bit absolute address space can be allocated in an 8-bit address space
by applying optimization.
When option optimize=speed is not specified, the file is compressed after optimizing the
saving and restoring of register contents between functions, and replacing saving and restoring
of multiple register contents with function calls.
Sections including .org, .align, or .data directive can be optimized.
The strip option can be used to delete debugging information from either the load module file
or the library file.
The compress option can be used to compress debugging information.
Input of an object file with a CPU type of H8SX is supported.
The space option can be used to fill the specified value in an empty area.
The memory option specifies the used size of internal memory.
The sbr option specifies the address to locate the 8-bit absolute address area.
The error level for overlapping section addresses at linkage is changed from Fatal in Ver. 7.0
to Error in Ver. 8.0. Thus, even when the section addresses overlap, the change_message
option can be used to continue processing on the user’s own responsibility.
955

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