MC9S12E256MFUE Freescale Semiconductor, MC9S12E256MFUE Datasheet - Page 345

• Manufacturer Part Number: MC9S12E256MFUE
• Description: IC MCU 256K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E256MFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 12
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 60
• Ram Memory Size: 16KB
• Cpu Speed: 25MHz
• No. Of Timers: 3
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

11.3.2.26 PMF Frequency Control B Register (PMFFQCB)
Read anytime and write only if MTG is set.
Freescale Semiconductor
Module Base + 0x0029
PWMRIEB
LDOKB
LDFQB
HALFB
Reset
Field
Field
7–4
1
0
3
W
R
Load Okay B — If MTG is clear, this bit reads zero and cannot be written.
If MTG is set, this bit loads the PRSCB bits, the PMFMODB register and the PWMVAL2–3 registers into a set of
buffers. The buffered prescaler divisor B, PWM counter modulus B value, PWM2–3 pulse widths take effect at
the next PWM reload.
Set LDOKB by reading it when it is logic zero and then writing a logic one to it. LDOKB is automatically cleared
after the new values are loaded, or can be manually cleared before a reload by writing a logic zero to it. Reset
clears LDOKB.
0 Do not load new modulus B, prescaler B, and PWM2–3 values.
1 Load prescaler B, modulus B, and PWM2–3 values.
Note: Do not set PWMENB bit before setting the LDOKB bit and do not clear the LDOKB bit at the same time as
PWM Reload Interrupt Enable B — If MTG is clear, this bit reads zero and cannot be written.
If MTG is set, this bit enables the PWMRFB flag to generate CPU interrupt requests.
0 PWMRFB CPU interrupt requests disabled
1 PWMRFB CPU interrupt requests enabled
Load Frequency B — This field selects the PWM load frequency according to
Section 11.4.7.2, “Load Frequency”
Note: The LDFQB field takes effect when the current load cycle is complete, regardless of the state of the load
Half Cycle Reload B — This bit enables half-cycle reloads in center-aligned PWM mode. This bit has no effect
on edge-aligned PWMs.
0 Half-cycle reloads disabled
1 Half-cycle reloads enabled
0
7
setting the PWMENB bit.
okay bit, LDOKB. Reading the LDFQB field reads the buffered value and not necessarily the value
currently in effect.
Figure 11-32. PMF Frequency Control B Register (PMFFQCB)
Table 11-32. PMFENCB Field Descriptions (continued)
0
6
LDFQB
Table 11-33. PMFFQCB Field Descriptions
MC9S12E256 Data Sheet, Rev. 1.08
0
5
for more details.
Chapter 11 Pulse Width Modulator with Fault Protection (PMF15B6CV2)
0
4
Description
Description
HALFB
3
0
0
2
PRSCB
Table
11-34. See
0
1
PWMRFB
0
0
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