MC9S12E256MFUE Freescale Semiconductor, MC9S12E256MFUE Datasheet - Page 92

• Manufacturer Part Number: MC9S12E256MFUE
• Description: IC MCU 256K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E256MFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 12
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 60
• Ram Memory Size: 16KB
• Cpu Speed: 25MHz
• No. Of Timers: 3
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 2 256 Kbyte Flash Module (FTS256K2V1)
2.3.2.4
The unbanked FCNFG register enables the Flash interrupts and gates the security backdoor writes.
CBEIE, CCIE, KEYACC and BKSEL bits are readable and writable while all remaining bits read 0 and
are not writable. KEYACC is only writable if KEYEN (see
(FSEC)”) is set to the enabled state.
92
KEYACC
BKSEL
Reset
CBEIE
Field
CCIE
7
6
5
0
W
R
CBEIE
Command Buffer Empty Interrupt Enable — The CBEIE bit enables an interrupt in case of an empty command
buffer in the Flash module.
0 Command buffer empty interrupt disabled.
1 An interrupt will be requested whenever the CBEIF flag (see
Command Complete Interrupt Enable — The CCIE bit enables an interrupt in case all commands have been
completed in the Flash module.
0 Command complete interrupt disabled.
1 An interrupt will be requested whenever the CCIF flag (see
Enable Security Key Writing
0 Flash writes are interpreted as the start of a command write sequence.
1 Writes to Flash array are interpreted as keys to open the backdoor. Reads of the Flash array return invalid
Block Select — The BKSEL bit indicates which register bank is active.
0 Select register bank associated with Flash block 0.
1 Select register bank associated with Flash block 1.
Flash Configuration Register (FCNFG)
7
0
is set.
is set.
data.
= Unimplemented or Reserved
CCIE
6
0
Figure 2-7. Flash Configuration Register (FCNFG)
Table 2-9. FCNFG Field Descriptions
KEYACC
MC9S12E256 Data Sheet, Rev. 1.08
5
0
4
0
0
Description
Section 2.3.2.2, “Flash Security Register
3
0
0
Section 2.3.2.7, “Flash Status Register
Section 2.3.2.7, “Flash Status Register (FSTAT)”)
2
0
0
Freescale Semiconductor
1
0
0
BKSEL
(FSTAT)”)
0
0