SAK-TC1762-128F80HL AC Infineon Technologies, SAK-TC1762-128F80HL AC Datasheet - Page 4
![IC MCU 32BIT FLASH PG-LQFP-176](/photos/12/23/122347/sak-tc1762-128f80hl_ac_sml.jpg)
SAK-TC1762-128F80HL AC
Manufacturer Part Number
SAK-TC1762-128F80HL AC
Description
IC MCU 32BIT FLASH PG-LQFP-176
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet
1.SAK-TC1762-128F80HL_AC.pdf
(114 pages)
Specifications of SAK-TC1762-128F80HL AC
Core Processor
TriCore
Core Size
32-Bit
Speed
80MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
81
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
52K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 2x10b; A/D 32x8b,10b,12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
176-LFQFP
Packages
PG-LQFP-176
Max Clock Frequency
80.0 MHz
Sram (incl. Cache)
52.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
36
Program Memory
1.0 MB
For Use With
B158-H8539-G2-X-7600IN - KIT STARTER TC176X SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
KT1762128F80HLACXT
SAK-TC1762-128F80HLACINTR
SP000318061
SAK-TC1762-128F80HLACINTR
SP000318061
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Preliminary
TC1762 Data Sheet
Revision History: V1.0, 2008-04
Previous Version: V0.5 2007-03
Page
7
8,
33
35
41
42
54
91
102
106
Trademarks
TriCore® is a trademark of Infineon Technologies AG.
Data Sheet
We Listen to Your Comments
Any information within this document that you feel is wrong, unclear or missing at all?
Your feedback will help us to continuously improve the quality of this document.
Please send your proposal (including a reference to this document) to:
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10
Subjects (major changes since last revision)
VSSOSC3 is deleted from the TC1762 Logic Symbol.
TDATA0 of Pin 17, TCLK0 of Pin 20, TCLK0 of Pin 74 and TDATA0 of Pin
77 are updated in the Pinning Diagram and Pin Definition and Functions
Table.
Transmit DMA request in Block Diagram of ASC Interfaces is updated.
Alternate output functions in block diagram of SSC interfaces are updated.
Programmable baud rate of the MLI is updated.
TDATA0 and TCLK0 of the block diagram of MLI interfaces are updated.
The description for WDT double reset detection is updated.
The power sequencing details is updated.
MLI timing, maximum operating frequency limit is extended, t31 is added.
Thermal resistance junction leads is updated.
V1.0, 2008-04
TC1762
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