SAK-C167SR-LM HA+ Infineon Technologies, SAK-C167SR-LM HA+ Datasheet - Page 47
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SAK-C167SR-LM HA+
Manufacturer Part Number
SAK-C167SR-LM HA+
Description
IC MCU 25MHZ MQFP-144
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAB-C167CR-LM_HA.pdf
(89 pages)
Specifications of SAK-C167SR-LM HA+
Core Processor
C166
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
144- BSQFP
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
1xUSART, 1xSSC
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
111
Number Of Timers
9
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Packages
PG-MQFP-144
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
4.0 KByte
A / D Input Lines (incl. Fadc)
16
Program Memory
0.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
K167SRLMHAZNP
K167SRLMHAZXP
SAK-C167SR-LMHAIN
SAK-C167SR-LMHAINTR
SAK-C167SR-LMHAINTR
SP000103458
K167SRLMHAZXP
SAK-C167SR-LMHAIN
SAK-C167SR-LMHAINTR
SAK-C167SR-LMHAINTR
SP000103458
C167CR
C167SR
Functional Description
3.12
Parallel Ports
The C167CR provides up to 111 I/O lines which are organized into eight input/output
ports and one input port. All port lines are bit-addressable, and all input/output lines are
individually (bit-wise) programmable as inputs or outputs via direction registers. The I/O
ports are true bidirectional ports which are switched to high impedance state when
configured as inputs. The output drivers of five I/O ports can be configured (pin by pin)
for push/pull operation or open-drain operation via control registers. During the internal
reset, all port pins are configured as inputs.
The input threshold of Port 2, Port 3, Port 6, Port 7, and Port 8 is selectable (TTL or
CMOS like), where the special CMOS like input threshold reduces noise sensitivity due
to the input hysteresis. The input threshold may be selected individually for each byte of
the respective ports.
All port lines have programmable alternate input or output functions associated with
them. All port lines that are not used for these alternate functions may be used as general
purpose IO lines.
PORT0 and PORT1 may be used as address and data lines when accessing external
memory, while Port 4 outputs the additional segment address bits A23/19/17 … A16 in
systems where segmentation is enabled to access more than 64 Kbytes of memory.
Port 2, Port 8 and Port 7 (and parts of PORT1) are associated with the capture inputs or
compare outputs of the CAPCOM units and/or with the outputs of the PWM module.
Port 6 provides optional bus arbitration signals (BREQ, HLDA, HOLD) and chip select
signals.
Port 3 includes alternate functions of timers, serial interfaces, the optional bus control
signal BHE/WRH, and the system clock output (CLKOUT).
Port 5 is used for the analog input channels to the A/D converter or timer control signals.
The edge characteristics (transition time) of the C167CR’s port drivers can be selected
via the Port Driver Control Register (PDCR). Two bits select fast edges (‘0’) or reduced
edges (‘1’) for bus interface pins and non-bus pins separately.
PDCR.0 = BIPEC controls PORT0, PORT1, Port 4, RD, WR, ALE, CLKOUT, BHE/WRH.
PDCR.4 = NBPEC controls Port 3, Port 8, RSTOUT, RSTIN (bidir. reset mode).
Data Sheet
45
V3.3, 2005-02