EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 75

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

DS785UM1
With saturation enabled (the default), the maximum representable value is returned on
overflow and the minimum representable value is returned on underflow. The maximum and
minimum values depends on the operand size and whether the UI bit in the DSPSC is set, as
shown in
To disable saturation on overflow and underflow, set the ISAT bit in the DSPSC.
Normally, arithmetic instructions that write to an accumulator do not saturate their results on
overflow or underflow. These instructions are:
However, the SAT[1:0] bits in the DSPSC may be set to select one of several kinds of
saturation to occur on the results of these instructions before they are written to an
accumulator.
Enabling saturation also modifies the representation of data stored in the accumulator. The
three supported bit formats and their maximum and minimum saturation values are shown in
Table
The bit format x.yy represents x binary bits before the decimal point and yy fraction bits after
the decimal point, as for example, when the bit format 2.62 has two binary bits and sixty-two
fraction bits. Though these formats utilize either 32- or 64-bit integers, the accumulators are
Note:This action does not affect the operation of instructions that do not write their result to an
• CFMADD32 and CFMSUB32
• CFMADDA32 and CFMSUBA32
3-2.
Bit Format
accumulator.
2.62
1.63
1.31
Table
Underflow
Overflow
3-1.
64 bits - 0x3FFF FFFF FFFF FFFF
64 bits - 0x7FFF FFFF FFFF FFFF
Table 3-2. Accumulator Bit Formats for Saturation
32 bits -
Table 3-1. Saturation for Non-accumulator Instructions
Maximum Value (hex)
Unsigned
Unsigned
Signed
Signed
Copyright 2007 Cirrus Logic
0x7FFF FFFF
32-bit
64-bit
32-bit
64-bit
32-bit
64-bit
32-bit
64-bit
0x7FFF_FFFF
0x7FFF_FFFF_FFFF_FFFF
0xFFFF_FFFF
0xFFFF_FFFF_FFFF_FFFF
0x8000_0000
0x8000_0000_0000_0000
0x0000_0000
0x0000_0000_0000_0000
64 bits - 0xC000 0000 0000 0000
64 bits - 0x8000 0000 0000 0000
32 bits -
Minimum Value (hex)
MaverickCrunch Co-Processor
0x8000 0000
EP93xx User’s Guide
3-5
3