C8051T635-GM Silicon Laboratories Inc, C8051T635-GM Datasheet - Page 137

IC MCU 2KB 20PIN QFN

C8051T635-GM

Manufacturer Part Number
C8051T635-GM
Description
IC MCU 2KB 20PIN QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T63xr
Datasheets

Specifications of C8051T635-GM

Program Memory Type
OTP
Program Memory Size
2KB (2K x 8)
Package / Case
20-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
17
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T630DK
Minimum Operating Temperature
- 40 C
Package
20QFN EP
Device Core
8051
Family Name
C8051T63x
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1464 - KIT DEV FOR C8051T630 FAMILY
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1463-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051T635-GM
Manufacturer:
Silicon
Quantity:
750
of the slave address mask means that bit will be treated as a “don’t care” for comparison purposes. In this
case, either a 1 or a 0 value are acceptable on the incoming slave address. Additionally, if the GC bit in
register SMB0ADR is set to 1, hardware will recognize the General Call Address (0x00). Table 21.4 shows
some example parameter settings and the slave addresses that will be recognized by hardware under
those conditions.
SFR Definition 21.3. SMB0ADR: SMBus Slave Address
SFR Address = 0xD7
Hardware Slave Address
SLV[6:0]
0x34
0x34
0x34
0x34
0x70
Name
Reset
Bit
7:1
Type
0
Bit
SLV[6:0]
Table 21.4. Hardware Address Recognition Examples (EHACK = 1)
Name
GC
7
0
SMBus Hardware Slave Address.
Defines the SMBus Slave Address(es) for automatic hardware acknowledgement.
Only address bits which have a 1 in the corresponding bit position in SLVM[6:0]
are checked against the incoming address. This allows multiple addresses to be
recognized.
General Call Address Enable.
When hardware address recognition is enabled (EHACK = 1), this bit will deter-
mine whether the General Call Address (0x00) is also recognized by hardware.
0: General Call Address is ignored.
1: General Call Address is recognized.
6
0
Slave Address Mask
SLVM[6:0]
0x7F
0x7F
0x7E
0x7E
0x73
5
0
SLV[6:0]
R/W
Rev. 1.0
4
0
GC bit
0
1
0
1
0
Function
3
0
C8051T630/1/2/3/4/5
Slave Addresses Recognized by
Hardware
0x34
0x34, 0x00 (General Call)
0x34, 0x35
0x34, 0x35, 0x00 (General Call)
0x70, 0x74, 0x78, 0x7C
2
0
1
0
R/W
GC
0
0
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