C8051F901-GU Silicon Laboratories Inc, C8051F901-GU Datasheet - Page 35

IC MCU 8BIT 8KB FLASH 24QSOP

C8051F901-GU

Manufacturer Part Number
C8051F901-GU
Description
IC MCU 8BIT 8KB FLASH 24QSOP
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Datasheets

Specifications of C8051F901-GU

Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
24-QSOP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 15x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Ram Size
768 B
Interface Type
UART
Maximum Clock Frequency
25 MHz
Number Of Timers
4
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F912DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Package
24QSOP
Device Core
8051
Family Name
C8051F90x
Maximum Speed
25 MHz
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1847-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F901-GU
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
Notes:
General
1.
2.
Solder Mask Design
1.
Stencil Design
1.
2.
3.
Card Assembly
1.
2.
All dimensions shown are in millimeters (mm) unless otherwise noted.
This land pattern is based on the IPC-7351 guidelines.
All metal pads are to be non-solder mask defined (NMSD). Clearance between the solder mask and
the metal pad is to be 60 m minimum, all the way around the pad.
A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used to
assure good solder paste release.
The stencil thickness should be 0.125 mm (5 mils).
The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads.
A No-Clean, Type 3 solder paste is recommended.
The recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body
Components.
Dimension
C
E
X
Y
Figure 3.6. QSOP-24 Landing Diagram
Table 3.5. PCB Land Pattern
Rev. 1.0
5.20
0.30
1.50
MIN
C8051F91x-C8051F90x
0.635 BSC
MAX
5.30
0.40
1.60
35

Related parts for C8051F901-GU