MC705P6ACDWE Freescale Semiconductor, MC705P6ACDWE Datasheet - Page 65

IC MCU 176 BYTES RAM 28-SOIC

MC705P6ACDWE

Manufacturer Part Number
MC705P6ACDWE
Description
IC MCU 176 BYTES RAM 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HC05r
Datasheet

Specifications of MC705P6ACDWE

Core Processor
HC05
Core Size
8-Bit
Speed
2.1MHz
Connectivity
SIO
Peripherals
POR, WDT
Number Of I /o
21
Program Memory Size
4.5KB (4.5K x 8)
Program Memory Type
OTP
Ram Size
176 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
HC705P
Core
HC05
Data Bus Width
8 bit
Data Ram Size
176 B
Maximum Clock Frequency
2.1 MHz
Number Of Programmable I/os
21
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
11.3 MOR Programming
The contents of the MOR should be programmed in bootloader mode using the hardware shown in
Figure 10-2. MC68HC705P6A EPROM Programming
implemented bits in the MOR are essentially read-write bits in bootloader mode as shown in
The programming of the MOR is the same as user EPROM.
A sample routine to program a byte of EPROM is shown in
Once the MOR bits have been programmed, the options are not loaded into the MOR registers until the
part is reset.
Freescale Semiconductor
1. Set the ELAT bit in the EPROG register.
2. Write the desired data to the desired MOR address.
3. Set the EPGM bit in the EPROG.
4. Wait for the programming time (t
5. Clear the ELAT and EPGM bits in the EPROG.
6. Remove the programming voltage from the IRQ/V
001C
00FF
0023
1EFF
1F00
0000
00E0
00E0
00E2
00E4
00E6
00E9
00EB
00ED
00EF
A6 04
B7 1C
A6 FF
C7 1E FF
12 1C
AD 03
3F 1C
81
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
Table 11-2. MOR Programming Routine
EPROG
DATA2
DATA1
MOR2
MOR1
EPGM
EPGM
EQU
EQU
EQU
EQU
EQU
EQU
ORG
LDA
STA
LDA
STA
BSET EPGM,EPROG
BSR
CLR
RTS
).
$1C
$FF
#23
$1EFF
$1F00
$00
$E0
#$04
EPROG
#DATA2
MOR2
DELAY
EPROG
Flowchart. In order to allow programming, all the
PP
Table
pin.
PROGRAMMING REG
SAMPLE MOR VALUES
MOPR ADDRESSES
EPGM BIT IN EPROG REG
SET ELAT BIT
IN EPGM REG AT $1C
DATA BYTE
WRITE IT TO MOR LOC
TURN ON PGM VOLTAGE
WAIT 4 ms MINIMUM
CLR EPGM REGISTER
11-2.
MOR Programming
Figure
11-1.
65