PIC16F688-E/ML Microchip Technology, PIC16F688-E/ML Datasheet - Page 345

• Manufacturer Part Number: PIC16F688-E/ML
• Description: IC PIC MCU FLASH 4KX14 16QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-E/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-QFN
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, RS- 232, SCI, USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / Rohs Status: Details

Figure 18-1:
Figure 18-2:
1997 Microchip Technology Inc.
Write to TXREG
TXIF bit
(Transmit buffer
reg. empty flag)
TRMT bit
(Transmit shift
reg. empty flag)
BRG output
(shift clock)
TX/CK pin
USART Transmit Block Diagram
Asynchronous Master Transmission
Steps to follow when setting up a Asynchronous Transmission:
1.
2.
3.
4.
5.
6.
7.
WORD 1
Transmit Shift Reg
TXIE
Initialize the SPBRG register for the appropriate baud rate. If a high speed baud rate is
desired, set the BRGH bit. (Subsection
Enable the asynchronous serial port by clearing the SYNC bit and setting the SPEN bit.
If interrupts are desired, then set the TXIE, GIE and PEIE bits.
If 9-bit transmission is desired, then set the TX9 bit.
Enable the transmission by setting the TXEN bit, which will also set the TXIF bit.
If 9-bit transmission is selected, the ninth bit should be loaded in the TX9D bit.
Load data to the TXREG register (starts transmission).
Word 1
Interrupt
TXEN
TXIF
Baud Rate Generator
Start Bit
SPBRG
Baud Rate CLK
Bit 0
MSb
(8)
TX9D
Bit 1
TSR register
WORD 1
TX9
TXREG register
18.3 “USART Baud Rate Generator (BRG)”
Section 18. USART
8
Data Bus
8
LSb
0
Bit 7/8
TRMT
Stop Bit
Pin Buffer
and Control
DS31018A-page 18-9
SPEN
TX/CK pin
)
18