PIC16F688-E/ML Microchip Technology, PIC16F688-E/ML Datasheet - Page 524

• Manufacturer Part Number: PIC16F688-E/ML
• Description: IC PIC MCU FLASH 4KX14 16QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-E/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-QFN
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, RS- 232, SCI, USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / Rohs Status: Details

PICmicro MID-RANGE MCU FAMILY
29.1
DS31029A-page 29-2
Introduction
Each midrange instruction is a 14-bit word divided into an OPCODE which specifies the instruc-
tion type and one or more operands which further specify the operation of the instruction. The
midrange Instruction Set Summary in
assembler. The instruction set is highly orthogonal and is grouped into three basic categories:
• Byte-oriented operations
• Bit-oriented operations
• Literal and control operations
Table 29-2
For byte-oriented instructions, 'f' represents a file register designator and 'd' represents a des-
tination designator. The file register designator specifies which file register is to be used by the
instruction.
The destination designator specifies where the result of the operation is to be placed. If 'd' is zero,
the result is placed in the W register. If 'd' is one, the result is placed in the file register specified
in the instruction.
For bit-oriented instructions, 'b' represents a bit field designator which selects the number of the
bit affected by the operation, while 'f' represents the number of the file in which the bit is located.
For literal and control operations, 'k' represents an eight or eleven bit constant or literal value.
All instructions are executed in one single instruction cycle, unless a conditional test is true or the
program counter is changed as a result of an instruction. In these cases, the execution takes two
instruction cycles with the second cycle executed as an NOP. One instruction cycle consists of
four oscillator periods. Thus, for an oscillator frequency of 4 MHz, the normal instruction execu-
tion time is 1 s. If a conditional test is true or the program counter is changed as a result of an
instruction, the instruction execution time is 2 s.
gives the opcode field descriptions.
Table 29-1
lists the instructions recognized by the MPASM
1997 Microchip Technology Inc.