PIC16F688-E/ML Microchip Technology, PIC16F688-E/ML Datasheet - Page 448

• Manufacturer Part Number: PIC16F688-E/ML
• Description: IC PIC MCU FLASH 4KX14 16QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-E/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-QFN
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, RS- 232, SCI, USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / Rohs Status: Details

PICmicro MID-RANGE MCU FAMILY
24.3
DS31024A-page 24-6
Conversion Process
There are two methods for performing a conversion. To determine the end of conversion, the first
method uses the ADTMR overflow interrupt (OVFIF bit). The second method uses the A/D Cap-
ture Interrupt (ADCIF bit). At the end of conversion both bits are used to determine if an over-
range condition has occurred.
Method 1 uses a fixed conversion time, this means that the capacitor voltage always ramps to
the full scale voltage. Immediately after the overflow of the ADTMR, we recommend that the
ADRST bit is set to discharge the external capacitor. This will ensure that the residual voltage on
the external capacitor, due to dielectric absorption, is independent of input voltage or previous
conversions.
Method 2 uses a variable conversion time, which results in faster conversions for lower input volt-
ages.
Steps for Method 1 (“fixed conversion time”):
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Do Conversion Calculations
11. Goto Step 2
Initialize the Slope A/D module:
Set the ADRST bit (ADCON0<1>), until the ramp capacitor reaches ground. This is capac-
itor dependent. A minimum of 200 s is recommended.
Select Input Channel
Clear the OVFIF and ADCIF bits.
Initialize Slope A/D Timer (ADTMR). ADTMR value depends on bits of resolution required
(see
To start a conversion, clear the ADRST bit, this allows the ramp capacitor to begin charg-
ing and the ADTMR to increment.
Conversion is complete when the Slope A/D timer (ADTMR) overflows from FFFFh to
0000h. This causes the OVFIF bit to be set.
Check if the ADCIF bit is set. If this bit is set, the value in the capture register ADCAP is
valid. This method depends on minimum latency to verify the capture interrupt flag bit after
the ADTMR overflows. If the ADCIF bit is cleared, then the input voltage was out of the
A/D input range.
Set the ADRST bit (ADCON0<1>) to stop ADTMR and discharge external capacitor
a)Clear the REFOFF bit (SLPCON<5>)
b)Clear the ADOFF bit (SLPCON<0>)
c)Initialize ADCON1<7:4> to select the programmable current source.
Table
24-1).
1997 Microchip Technology Inc.