PIC16F688-E/ML Microchip Technology, PIC16F688-E/ML Datasheet - Page 475

• Manufacturer Part Number: PIC16F688-E/ML
• Description: IC PIC MCU FLASH 4KX14 16QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-E/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-QFN
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, RS- 232, SCI, USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / Rohs Status: Details

25.8
25.9
1997 Microchip Technology Inc.
Effects of a Reset
Configuring the LCD Module
The LCD module is disabled, but the LCD pins are configured as LCD drivers. This ensures that
the microcontroller does not damage the LCD glass by accidently having a DC voltage across a
segment.
The following is the sequence of steps to follow to configure the LCD module.
1.
2.
3.
4.
5.
6.
- Multiplex mode and Bias, selected by the LMUX1:LMUX0 bits
- Timing source, selected by the CS1:CS0 bits
- Voltage generation, enabled by the VGEN bit
- Sleep mode operation, enabled by the SLPEN bit
Select the frame clock prescale using the LP3:LP0 bits (LCDPS<3:0>).
Configure the appropriate pins to function as segment drivers using the LCDSE register.
Configure the LCD module for the following using the LCDCON register.
Write initial values to pixel data registers, LCDD00 through LCDD15.
Clear LCD interrupt flag bit, LCDIF, and if desired, enable the interrupt by setting the
LCDIE bit.
Enable the LCD module, by setting the LCDEN bit (LCDCON<7>).
Section 25. LCD
DS31025A-page 25-17
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