PIC16F688-E/ML Microchip Technology, PIC16F688-E/ML Datasheet - Page 350

• Manufacturer Part Number: PIC16F688-E/ML
• Description: IC PIC MCU FLASH 4KX14 16QFN
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-E/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 16-QFN
• Controller Family/series: PIC16F
• No. Of I/o's: 12
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART, RS- 232, SCI, USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / Rohs Status: Details

PICmicro MID-RANGE MCU FAMILY
Figure 18-8:
Figure 18-9:
Table 18-7: Registers Associated with Asynchronous Reception
DS31018A-page 18-14
PIR
RCSTA
RCREG
PIE
TXSTA
SPBRG Baud Rate Generator Register
Legend: x = unknown, - = unimplemented locations read as '0'.
Note 1: The position of this bit is device dependent.
Name
Q2, Q4 clk
Q2, Q4 clk
baud clk
RX pin
RX pin
x4 clk
baud clk
Shaded cells are not used for Asynchronous Reception.
x4 clk
CSRC
SPEN
Bit 7
RX7
RX Pin Sampling Scheme (BRGH = 1)
RX Pin Sampling Scheme (BRGH = 1)
Bit 6
RX9
RX6
TX9
First falling edge after RX pin goes low
SREN
TXEN
Bit 5
RX5
1
Start Bit
Samples
1
First falling edge after RX pin goes low
CREN
SYNC
Bit 4
RX4
2
RCIE
RCIF
Second rising edge
Bit 3
(1)
(1)
RX3
3
—
—
Samples
Start Bit
4
BRGH
2
FERR
Bit 2
RX2
Second rising edge
1
Samples
Baud clk for all but start bit
OERR
TRMT
Bit 1
RX1
bit0
2
RX9D
TX9D
3
Bit 0
RX0
3
1997 Microchip Technology Inc.
4
0000 -00x
0000 0000
0000 -010
0000 0000
Value on:
POR,
BOR
0
0
1
Samples
bit1
4
0000 -00x
0000 0000
0000 -010
0000 0000
2
Value on
all other
Resets
0
0
bit0