ATMEGA8A-MUR Atmel, ATMEGA8A-MUR Datasheet - Page 103
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ATMEGA8A-MUR
Manufacturer Part Number
ATMEGA8A-MUR
Description
MCU AVR 8KB FLASH 16MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8A-MU.pdf
(308 pages)
Specifications of ATMEGA8A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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16.11.4
16.11.5
16.11.6
8159D–AVR–02/11
OCR1AH and OCR1AL– Output Compare Register 1 A
OCR1BH and OCR1BL – Output Compare Register 1 B
ICR1H and ICR1L – Input Capture Register 1
accesses these registers, the access is performed using an 8-bit temporary High byte Register
(TEMP). This temporary register is shared by all the other 16-bit registers.
Registers” on page 81.
Modifying the counter (TCNT1) while the counter is running introduces a risk of missing a Com-
pare Match between TCNT1 and one of the OCR1x Registers.
Writing to the TCNT1 Register blocks (removes) the Compare Match on the following timer clock
for all compare units.
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNT1). A match can be used to generate an Output Compare Interrupt, or to
generate a waveform output on the OC1x pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and Low bytes
are written simultaneously when the CPU writes to these registers, the access is performed
using an 8-bit temporary High byte Register (TEMP). This temporary register is shared by all the
other 16-bit registers.
The Input Capture is updated with the counter (TCNT1) value each time an event occurs on the
ICP1 pin (or optionally on the Analog Comparator Output for Timer/Counter1). The Input Cap-
ture can be used for defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and Low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
temporary High byte Register (TEMP). This temporary register is shared by all the other 16-bit
registers.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
See “Accessing 16-bit Registers” on page 81.
R/W
R/W
R/W
7
0
7
0
7
0
See “Accessing 16-bit Registers” on page 81.
R/W
R/W
R/W
6
0
6
0
6
0
R/W
R/W
R/W
5
0
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
OCR1A[15:8]
OCR1B[15:8]
OCR1A[7:0]
OCR1B[7:0]
ICR1[15:8]
ICR1[7:0]
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
1
0
See “Accessing 16-bit
ATmega8A
R/W
R/W
R/W
0
0
0
0
0
0
OCR1AH
OCR1BH
OCR1AL
OCR1BL
ICR1H
ICR1L
103
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