ATMEGA8A-MUR Atmel, ATMEGA8A-MUR Datasheet - Page 99
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ATMEGA8A-MUR
Manufacturer Part Number
ATMEGA8A-MUR
Description
MCU AVR 8KB FLASH 16MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8A-MU.pdf
(308 pages)
Specifications of ATMEGA8A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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16.11 Register Description
16.11.1
8159D–AVR–02/11
TCCR1A – Timer/Counter 1 Control Register A
Figure 16-13. Timer/Counter Timing Diagram, with Prescaler (f
• Bit 7:6 – COM1A1:0: Compare Output Mode for channel A
• Bit 5:4 – COM1B1:0: Compare Output Mode for channel B
The COM1A1:0 and COM1B1:0 control the Output Compare Pins (OC1A and OC1B respec-
tively) behavior. If one or both of the COM1A1:0 bits are written to one, the OC1A output
overrides the normal port functionality of the I/O pin it is connected to. If one or both of the
COM1B1:0 bit are written to one, the OC1B output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OC1A or OC1B pin must be set in order to enable the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x1:0 bits is depen-
dent of the WGM13:0 bits setting.
WGM13:0 bits are set to a normal or a CTC mode (non-PWM).
Table 16-2.
Bit
Read/Write
Initial Value
COM1A1/
COM1B1
(PC and PFC PWM)
and ICFn
(CTC and FPWM)
(Update at TOP)
TOVn
0
0
1
1
TCNTn
TCNTn
OCRnx
(clk
as TOP)
clk
clk
I/O
(FPWM)
I/O
COM1A1
Tn
/8)
(if used
R/W
Compare Output Mode, Non-PWM
7
0
COM1A0/
COM1B0
0
1
0
1
COM1A0
R/W
6
0
TOP - 1
TOP - 1
Description
Normal port operation, OC1A/OC1B disconnected.
Toggle OC1A/OC1B on Compare Match
Clear OC1A/OC1B on Compare Match (Set output to low level)
Set OC1A/OC1B on Compare Match (Set output to high level)
Old OCRnx Value
COM1B1
R/W
5
0
Table 16-2
COM1B0
R/W
4
0
shows the COM1x1:0 bit functionality when the
TOP
TOP
FOC1A
W
3
0
FOC1B
W
0
2
clk_I/O
BOTTOM
TOP - 1
New OCRnx Value
/8)
WGM11
R/W
1
0
ATmega8A
WGM10
BOTTOM + 1
R/W
0
0
TOP - 2
TCCR1A
99
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