ATMEGA8A-MUR Atmel, ATMEGA8A-MUR Datasheet - Page 39
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ATMEGA8A-MUR
Manufacturer Part Number
ATMEGA8A-MUR
Description
MCU AVR 8KB FLASH 16MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8A-MU.pdf
(308 pages)
Specifications of ATMEGA8A-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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10.2.2
10.2.3
8159D–AVR–02/11
External Reset
Brown-out Detection
Figure 10-3. MCU Start-up, RESET Extended Externally
An External Reset is generated by a low level on the RESET pin. Reset pulses longer than the
minimum pulse width (see
running. Shorter pulses are not guaranteed to generate a reset. When the applied signal
reaches the Reset Threshold Voltage – V
MCU after the time-out period t
Figure 10-4. External Reset During Operation
ATmega8A has an On-chip Brown-out Detection (BOD) circuit for monitoring the V
ing operation by comparing it to a fixed trigger level. The trigger level for the BOD can be
selected by the fuse BODLEVEL to be 2.7V (BODLEVEL unprogrammed), or 4.0V (BODLEVEL
programmed). The trigger level has a hysteresis to ensure spike free Brown-out Detection. The
hysteresis on the detection level should be interpreted as V
V
The BOD circuit can be enabled/disabled by the fuse BODEN. When the BOD is enabled
(BODEN programmed), and V
5), the Brown-out Reset is immediately activated. When V
(V
expired.
The BOD circuit will only detect a drop in V
ger than t
BOT
BOT+
INTERNAL
TIME-OUT
- V
in
RESET
HYST
RESET
BOD
V
Figure
CC
CC
/2.
given in
10-5), the delay counter starts the MCU after the time-out period t
Table 25-3 on page
Table 25-3 on page
V
POT
CC
TOUT
decreases to a value below the trigger level (V
has expired.
247.
RST
CC
if the voltage stays below the trigger level for lon-
on its positive edge, the delay counter starts the
247) will generate a reset, even if the clock is not
V
RST
t
TOUT
CC
BOT+
increases above the trigger level
= V
BOT
+ V
ATmega8A
HYST
BOT-
/2 and V
in
CC
Figure 10-
level dur-
TOUT
BOT-
has
39
=
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