ATXMEGA16A4-CUR Atmel, ATXMEGA16A4-CUR Datasheet - Page 184

MCU AVR 16+4KB FLASH 49VFBGA

ATXMEGA16A4-CUR

Manufacturer Part Number
ATXMEGA16A4-CUR
Description
MCU AVR 16+4KB FLASH 49VFBGA
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheets

Specifications of ATXMEGA16A4-CUR

Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
49-VFBGA
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATXMEGA16A4-CUR
Manufacturer:
Atmel
Quantity:
10 000
15.7.4
15.7.5
8077H–AVR–12/09
STATUS - Status Register
DTBOTH - Dead-time Concurrent Write to Both Sides
Table 15-1.
• Bit 7:3 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 2 - FDF: Fault Detect Flag
This flag is set when a fault detect condition is detected, i.e. when an event is detected on one of
the event channels enabled by the FDEVMASK. This flag is cleared by writing a one to its bit
location.
• Bit 1 - DTHSBUFV: Dead-Time High Side Buffer Valid
If this bit is set the corresponding DT buffer is written and contains valid data that will be copied
into the DTLS Register on the UPDATE condition. If this bit is zero no action will be taken. The
connected Timer/Counter’s lock update (LUPD) flag also affects the update for dead time
buffers.
• Bit 0 - DTLSBUFV: Dead-Time Low Side Buffer Valid
If this bit is set the corresponding DT buffer is written and contains valid data that will be copied
into the DTHS Register on the UPDATE condition. If this bit is zero no action will be taken. Note
that the connected Timer/Counter unit's lock update (LUPD) flag also affects the update for dead
time buffers.
Bit
+0x04
Read/Write
Initial Value
Bit
+0x06
Read/Write
Initial Value
FDACT[1:0]
00
01
11
R/W
Fault actions
R
7
0
-
7
0
Group Configuration
R
6
0
-
R/W
6
0
CLEARDIR
CLEAROE
NONE
R
5
0
-
R/W
5
0
R
4
0
-
R/W
4
0
Description
None (Fault protection disabled)
Clear all override enable (OUTOVEN) bits, i.e. disable
the output override.
Clear all Direction (DIR) bits, which correspond to
enabled DTI channel(s), i.e. tri-state the outputs
DTBOTH[7:0]
R
3
0
-
R/W
3
0
FDF
R/W
2
0
R/W
2
0
DTHSBUFV
R/W
1
0
R/W
1
0
DTLSBUFV
XMEGA A
R/W
0
0
R/W
0
0
STATUS
DTBOTH
184

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