ATMEGA32U4-AUR Atmel, ATMEGA32U4-AUR Datasheet - Page 362
![MCU AVR 16K FLASH 16MHZ 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA32U4-AUR
Manufacturer Part Number
ATMEGA32U4-AUR
Description
MCU AVR 16K FLASH 16MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16U4-MU.pdf
(433 pages)
Specifications of ATMEGA32U4-AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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7766F–AVR–11/10
Table 28-15. Minimum Wait Delay Before Writing the Next Flash or EEPROM Location
Symbol
t
t
t
1. Power-up sequence:
2. Wait for at least 20 ms and enable serial programming by sending the Programming
3. The serial programming instructions will not work if the communication is out of syn-
4. The Flash is programmed one page at a time. The memory page is loaded one byte at
5. The EEPROM array is programmed one byte at a time by supplying the address and
6. Any memory location can be verified by using the Read instruction which returns the
7. At the end of the programming session, RESET can be set high to commence normal
8. Power-off sequence (if needed):
WD_FLASH
WD_EEPROM
WD_ERASE
Apply power between V
tems, the programmer can not guarantee that SCK is held low during power-up. In this
case, RESET must be given a positive pulse of at least two CPU clock cycles duration
after SCK has been set to “0”.
Enable serial instruction to pin PDI.
chronization. When in sync. the second byte (0x53), will echo back when issuing the
third byte of the Programming Enable instruction. Whether the echo is correct or not, all
four bytes of the instruction must be transmitted. If the 0x53 did not echo back, give
RESET a positive pulse and issue a new Programming Enable command.
a time by supplying the 7 LSB of the address and data together with the Load Program
Memory Page instruction. To ensure correct loading of the page, the data low byte must
be loaded before data high byte is applied for a given address. The Program Memory
Page is stored by loading the Write Program Memory Page instruction with the address
lines 15..8. Before issuing this command, make sure the instruction Load Extended
Address Byte has been used to define the MSB of the address. The extended address
byte is stored until the command is re-issued, i.e., the command needs only be issued
for the first page, and when crossing the 64KWord boundary. If polling (
used, the user must wait at least t
15.) Accessing the serial programming interface before the Flash write operation com-
pletes can result in incorrect programming.
data together with the appropriate Write instruction. An EEPROM memory location is
first automatically erased before new data is written. If polling is not used, the user must
wait at least t
erased device, no 0xFFs in the data file(s) need to be programmed.
content at the selected address at serial output PDO. When reading the Flash memory,
use the instruction Load Extended Address Byte to define the upper address byte,
which is not included in the Read Program Memory instruction. The extended address
byte is stored until the command is re-issued, i.e., the command needs only be issued
for the first page, and when crossing the 64KWord boundary.
operation.
Set RESET to “1”.
Turn V
CC
power off.
WD_EEPROM
CC
before issuing the next byte. (See
and GND while RESET and SCK are set to “0”. In some sys-
WD_FLASH
before issuing the next page. (See
Minimum Wait Delay
4.5 ms
9.0 ms
9.0 ms
Table
ATmega16/32U4
28-15.) In a chip
RDY/BSY
Table 28-
) is not
362
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