AT90PWM3B-16MU Atmel, AT90PWM3B-16MU Datasheet - Page 133

• Manufacturer Part Number: AT90PWM3B-16MU
• Description: IC MCU AVR RISC 8K FLASH 32-QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-QFN
• Package: 32QFN EP
• Device Core: AVR
• Family Name: 90P
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 27
• Interface Type: SPI/USART
• On-chip Adc: 11-chx10-bit
• Number Of Timers: 2
• Processor Series: AT90PWMx
• Core: AVR8
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 10 bit, 1 Channel
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.4.2
4317J–AVR–08/10
Output Description
Note:
Table 16-2.
Table 16-3.
Table 16-4.
Note:
OCRnRB[1
5:12]
CLK I/O
CLK PLL
SYnIn
StopIn
PSCINn
from A C
PSCOUTn0
PSCOUTn1
PSCOUTn2
(PSC2 only)
PSCOUTn3(
PSC2 only)
SYnOut
PICRn
[11:0]
IRQPSCn
PSCnASY
StopOut
Name
Name
Name
Name
1. See
1. See
2.
See “Analog Synchronization” on page 157.
Frequency Resolution Enhancement value
(Flank Width Modulation)
Clock Input from I/O clock
Clock Input from PLL
Synchronization In (from adjacent PSC)
Stop Input (for synchronized mode)
Block Inputs
Input 0 used for Retrigger or Fault functions
Input 1 used for Retrigger or Fault functions
Block Outputs
Internal Outputs
Figure 16-38 on page 158
Figure 16-38 on page 158
Stop Output (for synchronized mode)
Synchronization Output
PSC n Input Capture Register
Counter value at retriggering event
PSC Interrupt Request : three souces, overflow, fault, and input
capture
ADC Synchronization (+ Amplifier Syncho. )
PSC n Output 0 (from part A of PSC)
PSC n Output 1 (from part B of PSC)
PSC n Output 2 (from part A or part B of PSC)
PSC n Output 3 (from part A or part B of PSC)
Description
Description
Description
Description
(1)
(1)
(2)
AT90PWM2/3/2B/3B
Register
4 bits
Signal
Signal
Signal
Signal
Signal
Signal
Signal
Register
12 bits
Signal
Signal
Signal
Signal
Signal
Signal
Type
Width
Type
Width
Type
Width
Type
Width
133