AT90PWM3B-16MU Atmel, AT90PWM3B-16MU Datasheet - Page 249

• Manufacturer Part Number: AT90PWM3B-16MU
• Description: IC MCU AVR RISC 8K FLASH 32-QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-QFN
• Package: 32QFN EP
• Device Core: AVR
• Family Name: 90P
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 27
• Interface Type: SPI/USART
• On-chip Adc: 11-chx10-bit
• Number Of Timers: 2
• Processor Series: AT90PWMx
• Core: AVR8
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 10 bit, 1 Channel
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4317J–AVR–08/10
In accordance with the Table 21-6, these 3 bits select the interrupt event which will generate the
trigger of the start of conversion. The start of conversion will be generated by the rising edge of
the selected interrupt flag whether the interrupt is enabled or not. In case of trig on PSCnASY
event, there is no flag. So in this case a conversion will start each time the trig event appears
and the previous conversion is completed
Table 21-6.
1.
Table 21-7.
ADTS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
ADTS3
0
0
0
0
0
0
0
0
1
1
For trigger on any PSC event, if the PSC uses the PLL clock, the core must use PLL/4 clock
source.
ADC Auto Trigger Source Selection for non amplified conversions
ADC Auto Trigger Source Selection for amplified conversions
ADTS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
ADTS2
0
0
0
0
1
1
1
1
0
0
ADTS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
ADTS1
0
0
1
1
0
0
1
1
0
0
ADTS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ADTS0
0
1
0
1
0
1
0
1
0
1
Description
Free Running Mode
Analog Comparator 0
External Interrupt Request 0
Timer/Counter0 Compare Match
Timer/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
PSC0ASY Event
PSC1ASY Event
PSC2ASY Event
Analog comparator 1
Analog comparator 2
Reserved
Reserved
Reserved
Description
Free Running Mode
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PSC0ASY Event
PSC1ASY Event
AT90PWM2/3/2B/3B
(1)
(1)
(1)
(1)
(1)
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