AT90PWM3B-16MU Atmel, AT90PWM3B-16MU Datasheet - Page 277

• Manufacturer Part Number: AT90PWM3B-16MU
• Description: IC MCU AVR RISC 8K FLASH 32-QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3B-16MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-QFN
• Package: 32QFN EP
• Device Core: AVR
• Family Name: 90P
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 27
• Interface Type: SPI/USART
• On-chip Adc: 11-chx10-bit
• Number Of Timers: 2
• Processor Series: AT90PWMx
• Core: AVR8
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 10 bit, 1 Channel
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

24.7.13
4317J–AVR–08/10
Boot Loader Parameters
In
ming are given.
Table 24-6.
Note:
Table 24-7.
BOOTSZ1
Section
Read-While-Write section (RWW)
No Read-While-Write section (NRWW)
Table 24-6
Do_spm:
Wait_spm:
Wait_ee:
1
1
0
0
; check for previous SPM complete
in
sbrc temp1, SPMEN
rjmp Wait_spm
; input: spmcrval determines SPM action
; disable interrupts if enabled, store status
in
cli
; check that no EEPROM write access is present
sbic EECR, EEPE
rjmp Wait_ee
; SPM timed sequence
out
spm
; restore SREG (to enable interrupts if originally enabled)
out
ret
The different BOOTSZ Fuse configurations are shown in
temp1, SPMCSR
temp2, SREG
SPMCSR, spmcrval
SREG, temp2
BOOTSZ0
through
Boot Size Configuration
Read-While-Write Limit
1
0
1
0
Table
Boot
Size
128
words
256
words
512
words
1024
words
24-8, the parameters used in the description of the self program-
Pages
16
32
4
8
Application
Flash
Section
0x000 -
0xF7F
0x000 -
0xEFF
0x000 -
0xDFF
0x000 -
0xBFF
Boot
Loader
Flash
Section
0xF80 -
0xFFF
0xF00 -
0xFFF
0xE00 -
0xFFF
0xC00 -
0xFFF
AT90PWM2/3/2B/3B
Figure
Pages
96
32
24-2.
End
Application
Section
0xF7F
0xEFF
0xDFF
0xBFF
Address
0x000 - 0xBFF
0xC00 - 0xFFF
Boot Reset
Address
(Start Boot
Loader
Section)
0xF80
0xF00
0xE00
0xC00
277