AT90CAN32-16AUR Atmel, AT90CAN32-16AUR Datasheet - Page 114

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AT90CAN32-16AUR

Manufacturer Part Number
AT90CAN32-16AUR
Description
MCU AVR 32K FLASH 16MHZ 64-TQFP
Manufacturer
Atmel
Series
AVR® 90CANr
Datasheets

Specifications of AT90CAN32-16AUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Data Bus Width
8 bit
Mounting Style
SMD/SMT
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90CAN32-16AUR
Manufacturer:
Atmel
Quantity:
10 000
13.2.1
114
AT90CAN32/64/128
Registers
Figure 13-1. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNTn), Output Compare Registers (OCRnx), and Input Capture Register
(ICRn) are all 16-bit registers. Special procedures must be followed when accessing the 16-bit
registers. These procedures are described in the section
116. The Timer/Counter Control Registers (TCCRnx) are 8-bit registers and have no CPU
access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals are all visible
in the Timer Interrupt Flag Register (TIFRn). All interrupts are individually masked with the Timer
Interrupt Mask Register (TIMSKn). TIFRn and TIMSKn are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the Tn pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
1. Refer to
on page 83
Figure 1-2 on page 5
Timer/Counter
for Timer/Counter
TCCRnA
OCRnB
OCRnC
OCRnA
TCNTn
ICRn
=
=
=
Direction
Count
Clear
1 and 3
or
Figure 1-3 on page
Control Logic
TOP
pin placement and description.
=
TCCRnB
(1)
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
clk
Detector
Edge
=
Tn
“Accessing 16-bit Registers” on page
6,
0
Table 9-6 on page
OCFnA
(Int.Req.)
OCFnB
(Int.Req.)
OCFnC
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
Generation
Waveform
Waveform
Waveform
( From Prescaler )
Canceler
TCCRnC
Detector
Noise
Edge
76, and
Comparator Ouput )
7679H–CAN–08/08
( From Analog
Table 9-15
OCnA
OCnB
OCnC
ICPn
Tn

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