DSPIC30F2011-30I/ML Microchip Technology, DSPIC30F2011-30I/ML Datasheet - Page 55

IC DSPIC MCU/DSP 12K 28QFN

DSPIC30F2011-30I/ML

Manufacturer Part Number
DSPIC30F2011-30I/ML
Description
IC DSPIC MCU/DSP 12K 28QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F2011-30I/ML

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
12
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DAF30-4 - DEVICE ATP FOR ICE4000
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F201130IML
TABLE 12-1:
© 2010 Microchip Technology Inc.
Step 8: Set the read pointer (W6) and load the (next four write) latches.
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
Step 9: Repeat Steps 7-8 eight times to load the write latches for the 32 instructions.
Step 10: Unlock the NVMCON for programming.
0000
0000
0000
0000
Step 11: Initiate the programming cycle.
0000
0000
0000
0000
0000
0000
0000
0000
Step 12: Reset the device internal PC.
0000
0000
Step 13: Repeat Steps 7-12 until all 23 rows of executive memory are programmed.
Command
(Binary)
EB0300
000000
BB0BB6
000000
000000
BBDBB6
000000
000000
BBEBB6
000000
000000
BB1BB6
000000
000000
BB0BB6
000000
000000
BBDBB6
000000
000000
BBEBB6
000000
000000
BB1BB6
000000
000000
200558
883B38
200AA9
883B39
A8E761
000000
000000
000000
000000
A9E761
000000
000000
040100
000000
(Hexadecimal)
PROGRAMMING THE PROGRAMMING EXECUTIVE (CONTINUED)
Data
CLR
NOP
TBLWTL
NOP
NOP
TBLWTH.B
NOP
NOP
TBLWTH.B
NOP
NOP
TBLWTL
NOP
NOP
TBLWTL
NOP
NOP
TBLWTH.B
NOP
NOP
TBLWTH.B
NOP
NOP
TBLWTL
NOP
NOP
MOV
MOV
MOV
MOV
BSET NVMCON, #15
NOP
NOP
Externally time ‘P12a’ ms (see
Timing
NOP
NOP
BCLR NVMCON, #15
NOP
NOP
GOTO 0x100
NOP
Requirements”)
W6
[W6++], [W7]
[W6++], [W7++]
[W6++], [++W7]
[W6++], [W7++]
[W6++], [W7]
[W6++], [W7++]
[W6++], [++W7]
[W6++], [W7++]
#0x55, W8
W8, NVMKEY
#0xAA, W9
W9, NVMKEY
Description
Section 13.0 “AC/DC Characteristics and
DS70102K-page 55

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