DSPIC30F2011-30I/ML Microchip Technology, DSPIC30F2011-30I/ML Datasheet - Page 63

• Manufacturer Part Number: DSPIC30F2011-30I/ML
• Description: IC DSPIC MCU/DSP 12K 28QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2011-30I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 12
• Flash Memory Size: 12KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DAF30-4 - DEVICE ATP FOR ICE4000
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F201130IML

APPENDIX C:
Revision K (November 2010)
This version of the document includes the following
updates:
• Added Note three to
• Updated the first paragraph of
• Updated
• Removed the VARIANT bit and updated the bit
• Removed the VARIANT bit and updated the bit
• Updated Note 3 in
• Updated Step 11 in
• Updated Steps 5, 12 and 19 in
• Updated Steps 5, 6 and 8 in
• Updated Steps 6 and 8 in
• Updated Steps 6 and 8 in
• Updated Entering ICSP™ Mode (see
• Updated Steps 4 and 11 in
• Renamed parameters: P12 to P12a and P13 to
© 2010 Microchip Technology Inc.
Note:
Enhanced ICSP Mode”
“Device ID”
definition for the DEVID register in
dsPIC30F Device ID Registers
field definition and description for the DEVID
register in
Mode”
Execution for BUlk Erasing Program Memory
(Only in Normal-voltage Systems)
Instruction Execution for Erasing Program
Memory (Either in Low-voltage or Normal-voltage
Systems)
Instruction Execution for Writing Configuration
Registers
Instruction Execution for Writing Code Memory
Instruction Execution for Writing Data EEPROM
Programming the Programming Executive
P13a, and added parameters P12b and P13b in
Table
13-1:
Table
Revision histories were not recorded for
revisions A through H. The previous
revision (J), was published in August
2007.
Table
AC/DC Characteristics
10-1: Device IDs
10-3:
Section 11.3 “Entering ICSP
Table
REVISION HISTORY
Section 5.2 “Entering
Device ID Bits Description
11-4:
Table
Table
Table
Table
Section 10.0
Table
Serial Instruction
11-8:
11-9:
12-1:
11-7:
Table
11-5:
Serial
Serial
Figure
Serial
10-2:
Serial
11-4)
DS70102K-page 63