AT89C51CC01UA-SLSUM Atmel, AT89C51CC01UA-SLSUM Datasheet - Page 135
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AT89C51CC01UA-SLSUM
Manufacturer Part Number
AT89C51CC01UA-SLSUM
Description
IC 8051 MCU FLASH 32K 44-PLCC
Manufacturer
Atmel
Series
AT89C CANr
Datasheet
1.T89C51CC01CA-7CTIM.pdf
(167 pages)
Specifications of AT89C51CC01UA-SLSUM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Package
44PLCC
Device Core
8051
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
34
Interface Type
CAN/UART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
AT89x
Core
8051
Data Ram Size
1280 B
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
CANADAPT28
Minimum Operating Temperature
- 40 C
Cpu Family
AT89
Device Core Size
8b
Frequency (max)
40MHz
Total Internal Ram Size
1.25KB
# I/os (max)
34
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
PLCC
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT89C51CC01UASLSUM
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89C51CC01UA-SLSUM
Manufacturer:
ATMEL
Quantity:
678
4129N–CAN–03/08
Table 110. ADCLK Register
ADCLK (S:F2h)
ADC Clock Prescaler
Reset Value = XXX0 0000b
Table 111. ADDH Register
ADDH (S:F5h Read Only)
ADC Data High Byte Register
Reset Value = 00h
Table 112. ADDL Register
ADDL (S:F4h Read Only)
ADC Data Low Byte Register
Reset Value = 00h
Number
Number
Number
ADAT 9
Bit
Bit
Bit
7-5
4-0
7-0
7-2
1-0
7
7
7
-
-
Mnemonic Description
Mnemonic Description
Mnemonic Description
ADAT 8
ADAT9:2
ADAT1:0
PRS4:0
Bit
Bit
Bit
6
6
6
-
-
-
-
Reserved
The value read from these bits are indeterminate. Do not set these bits.
Clock Prescaler
f
ADC result
bits 9-2
Reserved
The value read from these bits are indeterminate. Do not set these bits.
ADC result
bits 1-0
ADC
ADAT 7
= fcpu clock/ (4 (or 2 in X2 mode)* PRS )
5
5
5
-
-
ADAT 6
PRS 4
4
4
4
-
ADAT 5
PRS 3
3
3
3
-
ADAT 4
PRS 2
2
2
2
-
ADAT 3
ADAT 1
PRS 1
1
1
1
ADAT 2
ADAT 0
PRS 0
0
0
0
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