AT32UC3B0128-A2UT Atmel, AT32UC3B0128-A2UT Datasheet - Page 283
![IC MCU AVR32 128KB FLASH 64-TQFP](/photos/6/81/68127/313-64-vqfp_sml.jpg)
AT32UC3B0128-A2UT
Manufacturer Part Number
AT32UC3B0128-A2UT
Description
IC MCU AVR32 128KB FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3B0128-A2UT
Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
44
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
44
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1101
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
64TQFP
Device Core
AVR32
Family Name
AT32
Maximum Speed
60 MHz
Operating Supply Voltage
1.8|3.3 V
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATSTK600-TQFP64-2 - STK600 SOCKET/ADAPTER FOR 64-TQFATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3B0128-A2UT
Manufacturer:
XILINX
Quantity:
150
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- Download datasheet (11Mb)
• CKG: Transmit Clock Gating Selection
• CKI: Transmit Clock Inversion
• CKO: Transmit Clock Output Mode Selection
• CKS: Transmit Clock Selection
32059K–03/2011
Others
CKG
CKO
CKS
CKI affects only the Transmit Clock and not the output clock signal.
1: The data outputs (Data and Frame Sync signals) are shifted out on transmit clock rising edge. The Frame sync signal input is
sampled on transmit clock falling edge.
0: The data outputs (Data and Frame Sync signals) are shifted out on transmit clock falling edge. The Frame sync signal input is
sampled on transmit clock rising edge.
0
1
2
3
0
1
2
3
0
1
2
None, continuous clock
Transmit Clock enabled only if TX_FRAME_SYNC is low
Transmit Clock enabled only if TX_FRAME_SYNC is high
Reserved
Selected Transmit Clock
Divided Clock
RX_CLOCK clock signal
TX_CLOCK Pin
Reserved
Transmit Clock Gating
Transmit Clock Output Mode
None
Continuous transmit clock
Transmit clock only during data transfers
Reserved
TX_CLOCK pin
Input-only
Output
Output
AT32UC3B
283
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