AT32UC3B0128-A2UT Atmel, AT32UC3B0128-A2UT Datasheet - Page 54

• Manufacturer Part Number: AT32UC3B0128-A2UT
• Description: IC MCU AVR32 128KB FLASH 64-TQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3B0128-A2UT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 60MHz
• Connectivity: I²C, IrDA, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1101
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 64TQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 1.8|3.3 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATSTK600-TQFP64-2 - STK600 SOCKET/ADAPTER FOR 64-TQFATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

9.6.4
Name:
Access Type:
Offset:
Reset Value:
• PLLCOUNT: PLL Count
• PLLMUL: PLL Multiply Factor
• PLLDIV: PLL Division Factor
• PLLOPT: PLL Option
32059K–03/2011
31
23
15
7
-
-
-
-
Specifies the number of slow clock cycles before ISR:LOCKn will be set after PLLn has been written, or after PLLn has been
automatically re-enabled after exiting a sleep mode.
These fields determine the ratio of the ouput frequency of the internal VCO of the PLL (f
• f
• f
If PLLOPT[1] bit is set to 0: f
If PLLOPT[1] bit is set to 1: f
Note that the PLLMUL field cannot be equal to 0 or 1, or the behavior of the PLL will be undefined.
PLLDIV gives also the input frequency of the PLL (f
if the PLLDIV field is set to 0: f
if the PLLDIV field is greater than 0: f
Select the operating range for the PLL.
PLLOPT[0]: Select the VCO frequency range.
PLLOPT[1]: Enable the extra output divider.
PLLOPT[2]: Disable the Wide-Bandwidth mode (Wide-Bandwidth mode allows a faster startup time and out-of-lock time).
•
PLL Control Register
VCO
VCO
= (PLLMUL+1)/(PLLDIV) * f
= 2 * (PLLMUL+1) * f
30
22
14
6
-
-
-
-
PLL0,1
Read/Write
0x020, 0x024
0x00000000
OSC
PLL
PLL
IN
29
21
13
= f
= f
5
if PLLDIV = 0.
-
-
-
= f
VCO.
VCO
OSC
OSC.
IN
/ 2
if PLLDIV > 0.
= f
.
OSC
/ (2 * PLLDIV).
28
20
12
4
-
-
IN
):
PLLOPT
27
19
11
3
PLLCOUNT
26
18
10
2
PLLMUL
PLLDIV
VCO
) to the source oscillator frequency:
PLLOSC
25
17
9
1
AT32UC3B
PLLEN
24
16
8
0
54