ST72F621L4M1 STMicroelectronics, ST72F621L4M1 Datasheet - Page 95

• Manufacturer Part Number: ST72F621L4M1
• Description: IC MCU 8BIT LS 16K 34-SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F621L4M1

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 34-SOIC (7.5mm Width)
• Processor Series: ST72F6x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI, SPI, USB
• Maximum Clock Frequency: 12 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit
• For Use With: 497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: In Transition
• Other names: 497-2112-5

11 INSTRUCTION SET
11.1 CPU ADDRESSING MODES
The CPU features 17 different addressing modes
which can be classified in seven main groups:
The CPU Instruction set is designed to minimize
the number of bytes required per instruction: To do
Table 24. CPU Addressing Mode Overview
Addressing Mode
Inherent
Immediate
Direct
Indexed
Indirect
Relative
Bit operation
Inherent
Immediate
Short
Long
No Offset
Short
Long
Short
Long
Short
Long
Relative
Relative
Bit
Bit
Bit
Bit
Mode
Direct
Direct
Direct
Direct
Direct
Indirect
Indirect
Indirect
Indirect
Direct
Indirect
Direct
Indirect
Direct
Indirect
Indexed
Indexed
Indexed
Indexed
Indexed
Relative
Relative
Example
nop
ld A,#$55
ld A,$55
ld A,($55,X)
ld A,([$55],X)
jrne loop
bset
byte,#5
nop
ld A,#$55
ld A,$10
ld A,$1000
ld A,(X)
ld A,($10,X)
ld A,($1000,X)
ld A,[$10]
ld A,[$10.w]
ld A,([$10],X)
ld A,([$10.w],X)
jrne loop
jrne [$10]
bset $10,#7
bset [$10],#7
btjt $10,#7,skip
btjt [$10],#7,skip
Syntax
Doc ID 6996 Rev 5
Destination
0000..FFFF
00..FF
0000..FFFF
0000..FFFF
0000..FFFF
00..FF
00..1FE
00..FF
00..1FE
PC+/-127
PC+/-127
00..FF
00..FF
00..FF
00..FF
so, most of the addressing modes may be subdi-
vided in two submodes called long and short:
– Long addressing mode is more powerful be-
– Short addressing mode is less powerful because
The ST7 Assembler optimizes the use of long and
short addressing modes.
cause it can use the full 64 Kbyte address space,
however it uses more bytes and more CPU cy-
cles.
it can generally only access page zero (0000h -
00FFh range), but the instruction size is more
compact, and faster. All memory to memory in-
structions use short addressing modes only
(CLR, CPL, NEG, BSET, BRES, BTJT, BTJF,
INC, DEC, RLC, RRC, SLL, SRL, SRA, SWAP)
00..FF
00..FF
00..FF
00..FF
00..FF
00..FF
00..FF
Address
Pointer
(Hex.)
Pointer Size
byte
word
byte
word
byte
byte
byte
(Hex.)
+ 0
+ 1
+ 1
+ 2
+ 0
+ 1
+ 2
+ 2
+ 2
+ 2
+ 2
+ 1
+ 2
+ 1
+ 2
+ 2
+ 3
(Bytes)
Length
95/139