CY8CLED04D01-56LTXI Cypress Semiconductor Corp, CY8CLED04D01-56LTXI Datasheet - Page 27

• Manufacturer Part Number: CY8CLED04D01-56LTXI
• Description: IC POWERPSOC 4CH 1A 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: PowerPSoC® CY8CLEDr

Specifications of CY8CLED04D01-56LTXI

• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Core Processor: M8C
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: DALI, DMX512, I²C, IrDA, SPI, UART/USART
• Peripherals: LED, LVD, POR, PWM, WDT
• Number Of I /o: 14
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Operating Supply Voltage: 7 V to 32 V
• Maximum Supply Current: 50 mA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 428-2882 - KIT STARTER POWERPSOC LIGHTING428-2281 - KIT EVAL POWERPSOC LIGHTING428-2271 - KIT EVAL COLOR-LOCK428-2270 - KIT STARTER DEMO LIGHTING770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2279

15. Electrical Characteristics
15.1 System Level
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and T
Table 15-1. System Level Operating Specifications
15.2 Chip Level
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and T
Note See the PowerPSoC Mixed-Signal Array Technical Reference Manual for more information on the DPWMxPCF register
Table 15-2. Chip Level DC Specifications
Document Number: 001-46319 Rev. *E
VDD, AVDD
GDVDD
HVDD
I
I
I
I
VDD
AVDD
GDVDD
SB
Symbol
Symbol
t
J
D,MAX
J
f
SW
≤ 115
≤ 115°C. Typical parameters apply to 5V at 25°C. These are for design guidance only.
D
E
o
,
C. These are for design guidance only.
Digital, Analog, and Gate Driver Supply
Voltage Range
High Voltage Supply Voltage Range
Supply Current (VDD pins),
IMO = 24 MHz
Supply Current(AVDD pin)
Supply Current Per Channel(GDVDD
pins)
Sleep (Mode) Current with POR, LVD,
Sleep Timer, and WDT.
Circuit Switching Frequency Range for
Hysteretic Control Loop
Maximum Delay Time from CSA Input to
FET State Change
Output Duty Cycle for Hysteretic
Controllers
Power Converter Efficiency
Description
Description
4.75
Min
0.02
Min
90
7
–
–
–
–
–
–
–
5
Typ
16
18
30
Typ
–
–
–
–
–
95
–
–
–
CY8CLED04G01, CY8CLED03G01
CY8CLED04D01, CY8CLED04D02
CY8CLED03D01, CY8CLED03D02
Max
5.25
Max
100
550
100
32
50
25
25
25
95
2
–
Units
Units
MHz
mA
mA
mA
mA
ns
μA
μA
%
%
V
V
HVDD = 24V, I
f
HVDD = 24V, I
All should be powered from the
same source.
Applies to High Voltage pins CSPx
and SREGHVIN. Not all pins need
to be at the same voltage level.
Conditions are VDD = 5V, T
CPU = 3 MHz, SYSCLK doubler
disabled, VC1 = 1.5 MHz,
VC2 = 93.75 kHz, VC3 = 93.75 kHz,
analog power = off.
Conditions are VDD = 5V, T
Internal Power FET at 2 MHz
External Gate Driver at 1 MHz,
C
T
Regulator disabled, DPWMxPCF =
0, Power Peripherals disabled,
analog power = off
T
Regulator disabled, DPWMxPCF =
0, Power Peripherals disabled,
analog power = off
SW
J
J
L
= 25°C, Built-in Switching
= 115°C, Built-in Switching
= 4 nF at VDD = 5V
< 0.25 MHz
D
D
Notes
Notes
= 1A, f
= 1A, f
SW
SW
Page 27 of 47
= 2 MHz
= 2 MHz
J
J
= 25°C,
= 25°C,
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