MC9S08DZ48AMLF Freescale Semiconductor, MC9S08DZ48AMLF Datasheet - Page 131
![MCU 8BIT 48K FLASH EE 48-LQFP](/photos/37/62/376254/lqfp-48_sml.jpg)
MC9S08DZ48AMLF
Manufacturer Part Number
MC9S08DZ48AMLF
Description
MCU 8BIT 48K FLASH EE 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(4 pages)
3.MC9S08DZ48AMLF.pdf
(458 pages)
Specifications of MC9S08DZ48AMLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Eeprom Size
1.5K x 8
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
3 KB
Interface Type
CAN, I2C, SCI, SPI
Number Of Programmable I/os
40
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ48AMLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale Semiconductor
SUB #opr8i
SUB opr8a
SUB opr16a
SUB oprx16,X
SUB oprx8,X
SUB ,X
SUB oprx16,SP
SUB oprx8,SP
SWI
TAP
TAX
TPA
TST opr8a
TSTA
TSTX
TST oprx8,X
TST ,X
TST oprx8,SP
TSX
TXA
Source
Form
Subtract
A ← (A) – (M)
Software Interrupt
PC ← (PC) + $0001
Push (PCL); SP ← (SP) – $0001
Push (PCH); SP ← (SP) – $0001
Push (X); SP ← (SP) – $0001
Push (A); SP ← (SP) – $0001
Push (CCR); SP ← (SP) – $0001
I ← 1;
PCH ← Interrupt Vector High Byte
PCL ← Interrupt Vector Low Byte
Transfer Accumulator to CCR
CCR ← (A)
Transfer Accumulator to X (Index Register
Low)
X ← (A)
Transfer CCR to Accumulator
A ← (CCR)
Test for Negative or Zero
Transfer SP to Index Reg.
H:X ← (SP) + $0001
Transfer X (Index Reg. Low) to Accumulator
A ← (X)
Table 7-2. Instruction Set Summary (Sheet 8 of 9)
Operation
MC9S08DZ60 Series Data Sheet, Rev. 4
(M) – $00
(A) – $00
(X) – $00
(M) – $00
(M) – $00
(M) – $00
IMM
DIR
EXT
IX2
IX1
IX
SP2
SP1
INH
INH
INH
INH
DIR
INH
INH
IX1
IX
SP1
INH
INH
Object Code
9E D0
9E E0
9E 6D
A0
B0
C0
D0
E0
F0
83
84
97
85
3D
4D
5D
6D
7D
95
9F
ii
dd
hh ll
ee ff
ff
ee ff
ff
dd
ff
ff
Chapter 7 Central Processor Unit (S08CPUV3)
11
2
3
4
4
3
3
5
4
1
1
1
4
1
1
4
3
5
2
1
pp
rpp
prpp
prpp
rpp
rfp
pprpp
prpp
sssssvvfppp
p
p
p
rfpp
p
p
rfpp
rfp
prfpp
fp
p
Cyc-by-Cyc
Details
V 1 1 H I N Z C
↕ 1 1 – – ↕ ↕ ↕
– 1 1 – 1 – – –
↕ 1 1 ↕ ↕ ↕ ↕ ↕
– 1 1 – – – – –
– 1 1 – – – – –
0 1 1 – – ↕ ↕ –
– 1 1 – – – – –
– 1 1 – – – – –
on CCR
Affect
131
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