MC9S08DZ48AMLF Freescale Semiconductor, MC9S08DZ48AMLF Datasheet - Page 143
![MCU 8BIT 48K FLASH EE 48-LQFP](/photos/37/62/376254/lqfp-48_sml.jpg)
MC9S08DZ48AMLF
Manufacturer Part Number
MC9S08DZ48AMLF
Description
MCU 8BIT 48K FLASH EE 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(4 pages)
3.MC9S08DZ48AMLF.pdf
(458 pages)
Specifications of MC9S08DZ48AMLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Eeprom Size
1.5K x 8
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
3 KB
Interface Type
CAN, I2C, SCI, SPI
Number Of Programmable I/os
40
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ48AMLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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8.3.4
Freescale Semiconductor
IREFST
CLKST
PLLST
LOCK
LOLS
Field
3:2
7
6
5
4
Reset:
POR:
W
R
MCG Status and Control Register (MCGSC)
Loss of Lock Status — This bit is a sticky indication of lock status for the FLL or PLL. LOLS is set when lock
detection is enabled and after acquiring lock, the FLL or PLL output frequency has fallen outside the lock exit
frequency tolerance, D
reset or by writing a logic 1 to LOLS when LOLS is set. Writing a logic 0 to LOLS has no effect.
0 FLL or PLL has not lost lock since LOLS was last cleared.
1 FLL or PLL has lost lock since LOLS was last cleared.
Lock Status — Indicates whether the FLL or PLL has acquired lock. Lock detection is disabled when both the
FLL and PLL are disabled. If the lock status bit is set then changing the value of any of the following bits IREFS,
PLLS, RDIV[2:0], TRIM[7:0] (if in FEI or FBI modes), or VDIV[3:0] (if in PBE or PEE modes), will cause the lock
status bit to clear and stay cleared until the FLL or PLL has reacquired lock. Stop mode entry will also cause the
lock status bit to clear and stay cleared until the FLL or PLL has reacquired lock. Entry into BLPI or BLPE mode
will also cause the lock status bit to clear and stay cleared until the MCG has exited these modes and the FLL
or PLL has reacquired lock.
0 FLL or PLL is currently unlocked.
1 FLL or PLL is currently locked.
PLL Select Status — The PLLST bit indicates the current source for the PLLS clock. The PLLST bit does not
update immediately after a write to the PLLS bit due to internal synchronization between clock domains.
0 Source of PLLS clock is FLL clock.
1 Source of PLLS clock is PLL clock.
Internal Reference Status — The IREFST bit indicates the current source for the reference clock. The IREFST
bit does not update immediately after a write to the IREFS bit due to internal synchronization between clock
domains.
0 Source of reference clock is external reference clock (oscillator or external clock source as determined by the
1 Source of reference clock is internal reference clock.
Clock Mode Status — The CLKST bits indicate the current clock mode. The CLKST bits do not update
immediately after a write to the CLKS bits due to internal synchronization between clock domains.
00
01
10
11
EREFS bit in the MCGC2 register).
LOLS
Encoding 0 — Output of FLL is selected.
Encoding 1 — Internal reference clock is selected.
Encoding 2 — External reference clock is selected.
Encoding 3 — Output of PLL is selected.
7
0
0
Table 8-4. MCG Status and Control Register Field Descriptions
Figure 8-6. MCG Status and Control Register (MCGSC)
LOCK
0
0
6
unl
. LOLIE determines whether an interrupt request is made when set. LOLS is cleared by
MC9S08DZ60 Series Data Sheet, Rev. 4
PLLST
0
0
5
IREFST
1
1
4
Description
Chapter 8 Multi-Purpose Clock Generator (S08MCGV1)
0
0
3
CLKST
0
0
2
OSCINIT
0
0
1
FTRIM
U
0
0
143
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