MC9S08DZ48AMLF Freescale Semiconductor, MC9S08DZ48AMLF Datasheet - Page 386
![MCU 8BIT 48K FLASH EE 48-LQFP](/photos/37/62/376254/lqfp-48_sml.jpg)
MC9S08DZ48AMLF
Manufacturer Part Number
MC9S08DZ48AMLF
Description
MCU 8BIT 48K FLASH EE 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(4 pages)
3.MC9S08DZ48AMLF.pdf
(458 pages)
Specifications of MC9S08DZ48AMLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Eeprom Size
1.5K x 8
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
3 KB
Interface Type
CAN, I2C, SCI, SPI
Number Of Programmable I/os
40
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ48AMLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Appendix A Electrical Characteristics
A.12.4
Table A-16
386
1
3
4
5
2
and
Num
SPI
Maximum baud rate must be limited to 5 MHz due to pad input characteristics.
Refer to
All timing is shown with respect to 20% V
pins. All timing assumes slew rate control disabled and high drive strength enabled for SPI output
pins.
Time to data active from high-impedance state.
Hold time to high-impedance state.
10
11
12
1
2
3
4
5
6
7
8
9
Figure A-7
1
Figure A-7
D
D
D
D
D
D
D
D
D
D
D
D
C
Cycle time
Enable lead time
Enable lag time
Clock (SPSCK) high time
Clock (SPSCK) low time
Data setup time (inputs)
Data hold time (inputs)
Access time, slave
Disable time, slave
Data setup time (outputs)
Data hold time (outputs)
Operating frequency
through
through
Table A-16. SPI Electrical Characteristic
Rating
MC9S08DZ60 Series Data Sheet, Rev. 4
Figure A-10
Figure
Master and Slave
Master and Slave
3
4
2
5
A-10.
Master
Master
Master
Master
Master
Master
Master
Master
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
DD
describe the timing requirements for the SPI system.
and 70% V
Symbol
t
t
t
t
t
t
t
t
SCKH
SCKL
t
t
SI(M)
HI(M)
t
t
HI(S)
Lead
Lead
SI(S)
t
t
t
t
SCK
SCK
t
f
f
Lag
Lag
SO
SO
HO
HO
t
dis
op
op
A
DD
, unless noted; 100 pF load on all SPI
(1/2 t
(1/2 t
f
Bus
SCK
SCK
–10
–10
Min
1/2
1/2
30
30
30
30
25
25
dc
—
—
—
/2048
2
4
0
) – 25
)– 25
f
2048
Bus
Max
1/2
1/2
—
40
40
—
—
—
—
—
—
—
—
—
—
—
—
5
/4
Freescale Semiconductor
t
t
t
t
MHz
Unit
SCK
SCK
SCK
SCK
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
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