MC9S08DZ48AMLF Freescale Semiconductor, MC9S08DZ48AMLF Datasheet - Page 196
![MCU 8BIT 48K FLASH EE 48-LQFP](/photos/37/62/376254/lqfp-48_sml.jpg)
MC9S08DZ48AMLF
Manufacturer Part Number
MC9S08DZ48AMLF
Description
MCU 8BIT 48K FLASH EE 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(4 pages)
3.MC9S08DZ48AMLF.pdf
(458 pages)
Specifications of MC9S08DZ48AMLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Eeprom Size
1.5K x 8
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
3 KB
Interface Type
CAN, I2C, SCI, SPI
Number Of Programmable I/os
40
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ48AMLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 10 Analog-to-Digital Converter (S08ADC12V1)
10.6.1.3
The external analog inputs are typically shared with digital I/O pins on MCU devices. The pin I/O control
is disabled by setting the appropriate control bit in one of the pin control registers. Conversions can be
performed on inputs without the associated pin control register bit set. It is recommended that the pin
control register bit always be set when using a pin as an analog input. This avoids problems with contention
because the output buffer is in its high impedance state and the pullup is disabled. Also, the input buffer
draws DC current when its input is not at V
as analog inputs should be done to achieve lowest operating current.
Empirical data shows that capacitors on the analog inputs improve performance in the presence of noise
or when the source impedance is high. Use of 0.01 μF capacitors with good high-frequency characteristics
is sufficient. These capacitors are not necessary in all cases, but when used they must be placed as near as
possible to the package pins and be referenced to V
For proper conversion, the input voltage must fall between V
exceeds V
(full scale 10-bit representation) or 0xFF (full scale 8-bit representation). If the input is equal to or less
than V
straight-line linear conversions. There is a brief current associated with V
capacitor is charging. The input is sampled for 3.5 cycles of the ADCK source when ADLSMP is low, or
23.5 cycles when ADLSMP is high.
For minimal loss of accuracy due to current injection, pins adjacent to the analog input pins should not be
transitioning during conversions.
10.6.2
Several sources of error exist for A/D conversions. These are discussed in the following sections.
10.6.2.1
For proper conversions, the input must be sampled long enough to achieve the proper accuracy. Given the
maximum input resistance of approximately 7kΩ and input capacitance of approximately 5.5 pF, sampling
to within 1/4
8 MHz maximum ADCK frequency) provided the resistance of the external analog source (R
below 2 kΩ.
Higher source resistances or higher-accuracy sampling is possible by setting ADLSMP (to increase the
sample window to 23.5 cycles) or decreasing ADCK frequency to increase sample time.
10.6.2.2
Leakage on the I/O pins can cause conversion error if the external analog source resistance (R
If this error cannot be tolerated by the application, keep R
1/4
196
LSB
REFL
leakage error (N = 8 in 8-bit, 10 in 10-bit or 12 in 12-bit mode).
REFH
, the converter circuit converts it to 0x000. Input voltages between V
Sources of Error
LSB
Analog Input Pins
Sampling Error
Pin Leakage Error
, the converter circuit converts the signal to 0xFFF (full scale 12-bit representation), 0x3FF
(at 12-bit resolution) can be achieved within the minimum sample window (3.5 cycles @
MC9S08DZ60 Series Data Sheet, Rev. 4
DD
or V
SS
SSA
. Setting the pin control register bits for all pins used
.
AS
lower than V
REFH
and V
REFL
DDAD
REFL
. If the input is equal to or
/ (2
when the sampling
REFH
N
*I
Freescale Semiconductor
and V
LEAK
) for less than
REFL
AS
AS
) is kept
) is high.
are
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