MC9S08DZ48AMLF Freescale Semiconductor, MC9S08DZ48AMLF Datasheet - Page 14
![MCU 8BIT 48K FLASH EE 48-LQFP](/photos/37/62/376254/lqfp-48_sml.jpg)
MC9S08DZ48AMLF
Manufacturer Part Number
MC9S08DZ48AMLF
Description
MCU 8BIT 48K FLASH EE 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(4 pages)
3.MC9S08DZ48AMLF.pdf
(458 pages)
Specifications of MC9S08DZ48AMLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Eeprom Size
1.5K x 8
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
3 KB
Interface Type
CAN, I2C, SCI, SPI
Number Of Programmable I/os
40
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ48AMLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Section Number
11.3 Register Definition .........................................................................................................................202
11.4 Functional Description ...................................................................................................................209
11.5 Resets .............................................................................................................................................214
11.6 Interrupts ........................................................................................................................................214
11.7 Initialization/Application Information ...........................................................................................216
12.1 Introduction ....................................................................................................................................219
12.2 External Signal Description ...........................................................................................................222
12.3 Register Definition .........................................................................................................................223
14
11.3.1 IIC Address Register (IICA) ...........................................................................................203
11.3.2 IIC Frequency Divider Register (IICF) ...........................................................................203
11.3.3 IIC Control Register (IICC1) ..........................................................................................206
11.3.4 IIC Status Register (IICS) ...............................................................................................207
11.3.5 IIC Data I/O Register (IICD) ..........................................................................................208
11.3.6 IIC Control Register 2 (IICC2) .......................................................................................208
11.4.1 IIC Protocol .....................................................................................................................209
11.4.2 10-bit Address .................................................................................................................213
11.4.3 General Call Address ......................................................................................................214
11.6.1 Byte Transfer Interrupt ....................................................................................................214
11.6.2 Address Detect Interrupt .................................................................................................214
11.6.3 Arbitration Lost Interrupt ................................................................................................214
12.1.1 Features ...........................................................................................................................221
12.1.2 Modes of Operation ........................................................................................................221
12.1.3 Block Diagram ................................................................................................................222
12.2.1 RXCAN — CAN Receiver Input Pin .............................................................................222
12.2.2 TXCAN — CAN Transmitter Output Pin .....................................................................222
12.2.3 CAN System ...................................................................................................................222
12.3.1 MSCAN Control Register 0 (CANCTL0) ......................................................................223
12.3.2 MSCAN Control Register 1 (CANCTL1) ......................................................................226
12.3.3 MSCAN Bus Timing Register 0 (CANBTR0) ...............................................................227
12.3.4 MSCAN Bus Timing Register 1 (CANBTR1) ...............................................................228
12.3.5 MSCAN Receiver Interrupt Enable Register (CANRIER) .............................................231
12.3.6 MSCAN Transmitter Flag Register (CANTFLG) ..........................................................232
12.3.7 MSCAN Transmitter Interrupt Enable Register (CANTIER) ........................................233
12.3.8 MSCAN Transmitter Message Abort Request Register (CANTARQ) ...........................234
12.3.9 MSCAN Transmitter Message Abort Acknowledge Register (CANTAAK) .................235
12.3.10MSCAN Transmit Buffer Selection Register (CANTBSEL) .........................................235
12.3.11MSCAN Identifier Acceptance Control Register (CANIDAC) ......................................236
12.3.12MSCAN Miscellaneous Register (CANMISC) ..............................................................237
12.3.13MSCAN Receive Error Counter (CANRXERR) ............................................................238
Freescale Controller Area Network (S08MSCANV1)
MC9S08DZ60 Series Data Sheet, Rev. 4
Chapter 12
Title
Freescale Semiconductor
Page
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