MC9S08DZ48AMLF Freescale Semiconductor, MC9S08DZ48AMLF Datasheet - Page 202
![MCU 8BIT 48K FLASH EE 48-LQFP](/photos/37/62/376254/lqfp-48_sml.jpg)
MC9S08DZ48AMLF
Manufacturer Part Number
MC9S08DZ48AMLF
Description
MCU 8BIT 48K FLASH EE 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(4 pages)
3.MC9S08DZ48AMLF.pdf
(458 pages)
Specifications of MC9S08DZ48AMLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Eeprom Size
1.5K x 8
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
3 KB
Interface Type
CAN, I2C, SCI, SPI
Number Of Programmable I/os
40
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ48AMLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 11 Inter-Integrated Circuit (S08IICV2)
11.1.3
Figure 11-2
11.2
This section describes each user-accessible pin signal.
11.2.1
The bidirectional SCL is the serial clock line of the IIC system.
11.2.2
The bidirectional SDA is the serial data line of the IIC system.
11.3
This section consists of the IIC register descriptions in address order.
202
External Signal Description
Register Definition
Block Diagram
SCL — Serial Clock Line
SDA — Serial Data Line
is a block diagram of the IIC.
CTRL_REG
ADDR_DECODE
Control
Address
Clock
Input
Sync
Figure 11-2. IIC Functional Block Diagram
FREQ_REG
MC9S08DZ60 Series Data Sheet, Rev. 4
SCL
Arbitration
ADDR_REG
Control
Start
Stop
SDA
STATUS_REG
Interrupt
Compare
Register
Address
In/Out
Data
Shift
DATA_MUX
DATA_REG
Data Bus
Freescale Semiconductor
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