MC9S12XET256CAG Freescale Semiconductor, MC9S12XET256CAG Datasheet - Page 1293

• Manufacturer Part Number: MC9S12XET256CAG
• Description: MCU 16BIT 256K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XET256CAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: S12XE
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0x0140–0x017F MSCAN (CAN0) Map (continued)
Freescale Semiconductor
Address
Address
0x0154–
0x0158–
0x0160–
0x0170–
Detailed MSCAN Foreground Receive and Transmit Buffer Layout
0xXXXB
0xXXXC
0xXXXD
0xXXXE CANxRTSRH
0xXXXF
0xXXX0
0xXXX1
0xXXX2
0xXXX3
0xXXX4
0x015C
0xXX10
0x0157
0x015B
0x015F
0x016F
0x017F
–
–
CANxRDSR0–
CAN0IDMR0–
CAN0IDMR4–
CAN0IDAR4–
CANxRDSR7
CANxRTSRL
CAN0IDMR3
CAN0IDMR7
CAN0IDAR7
CANxRIDR0 W
CANxRIDR1 W
CANxRIDR2 W
CANxRIDR3 W
CAN0RXFG
Extended ID
Extended ID
Extended ID
Extended ID
Extended ID
CANxTIDR0
CAN0TXFG
Standard ID
Standard ID
Standard ID
Standard ID
CANRxDLR
Standard ID
Reserved
Name
Name
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
TSR15
TSR7
Bit 7
Bit 7
AM7
AM7
ID28
ID10
ID20
ID14
ID28
ID10
AC7
DB7
ID2
ID6
MC9S12XE-Family Reference Manual Rev. 1.23
(See
(See
TSR14
TSR6
Bit 6
Bit 6
AM6
AM6
ID27
ID19
ID13
ID27
AC6
DB6
ID9
ID1
ID5
ID9
Detailed MSCAN Foreground Receive and Transmit Buffer
Detailed MSCAN Foreground Receive and Transmit Buffer
TSR13
TSR5
Bit 5
Bit 5
AM5
AM5
ID26
ID18
ID12
ID26
AC5
DB5
ID8
ID0
ID4
ID8
FOREGROUND TRANSMIT BUFFER
FOREGROUND RECEIVE BUFFER
SRR=1
TSR12
TSR4
Bit 4
Bit 4
AM4
AM4
ID25
RTR
ID11
ID25
AC4
DB4
ID7
ID3
ID7
TSR11
IDE=1
IDE=0
DLC3
TSR3
Bit 3
Bit 3
ID24
ID10
ID24
AM3
AM3
AC3
DB3
ID6
ID2
ID6
Appendix E Detailed Register Address Map
TSR10
DLC2
TSR2
Bit 2
Bit 2
ID23
ID17
ID23
AM2
AM2
AC2
DB2
ID5
ID9
ID1
ID5
DLC1
TSR9
TSR1
Bit 1
Bit 1
ID22
ID16
ID22
AM1
AM1
DB1
AC1
Layout)
Layout)
ID4
ID8
ID0
ID4
DLC0
TSR8
TSR0
Bit 0
AM0
AM0
Bit 0
ID21
ID15
ID21
RTR
DB0
AC0
ID3
ID7
ID3
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