MC9S12XET256CAG Freescale Semiconductor, MC9S12XET256CAG Datasheet - Page 687

• Manufacturer Part Number: MC9S12XET256CAG
• Description: MCU 16BIT 256K FLASH 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XET256CAG

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 119
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: S12XE
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.3.0.8
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0008, 0x0009
Module Base + 0x000C, 0x000D
Module Base + 0x0010, 0x0011
Module Base + 0x0014, 0x0015
Reset
Reset
Reset
Reset
PMTLD[7:0]
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Field
W
W
W
W
R
R
R
R
7:0
PLD15 PLD14 PLD13 PLD12 PLD11 PLD10 PLD9 PLD8 PLD7 PLD6 PLD5 PLD4 PLD3 PLD2 PLD1 PLD0
PLD15 PLD14 PLD13 PLD12 PLD11 PLD10 PLD9 PLD8 PLD7 PLD6 PLD5 PLD4 PLD3 PLD2 PLD1 PLD0
PLD15 PLD14 PLD13 PLD12 PLD11 PLD10 PLD9 PLD8 PLD7 PLD6 PLD5 PLD4 PLD3 PLD2 PLD1 PLD0
PLD15 PLD14 PLD13 PLD12 PLD11 PLD10 PLD9 PLD8 PLD7 PLD6 PLD5 PLD4 PLD3 PLD2 PLD1 PLD0
15
15
15
15
0
0
0
0
PIT Micro Timer Load Bits 7:0 — These bits set the 8-bit modulus down-counter load value of the micro timers.
Writing a new value into the PITMTLD register will not restart the timer. When the micro timer has counted down
to zero, the PMTLD register value will be loaded. The PFLMT bits in the PITCFLMT register can be used to
immediately update the count register with the new value if an immediate load is desired.
PIT Load Register 0 to 3 (PITLD0–3)
14
14
14
14
0
0
0
0
13
13
13
13
0
0
0
0
12
12
12
12
0
0
0
0
Table 18-8. PITMTLD0–1 Field Descriptions
Figure 18-11. PIT Load Register 0 (PITLD0)
Figure 18-12. PIT Load Register 1 (PITLD1)
Figure 18-13. PIT Load Register 2 (PITLD2)
Figure 18-14. PIT Load Register 3 (PITLD3)
MC9S12XE-Family Reference Manual Rev. 1.23
11
11
11
11
0
0
0
0
10
10
10
10
0
0
0
0
0
0
0
0
9
9
9
9
Description
0
0
0
0
8
8
8
8
7
0
7
0
7
0
7
0
Chapter 18 Periodic Interrupt Timer (S12PIT24B4CV2)
0
0
0
0
6
6
6
6
0
0
0
0
5
5
5
5
0
0
0
0
4
4
4
4
0
0
0
0
3
3
3
3
0
0
0
0
2
2
2
2
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
687