R5F21266SNFP#U0 Renesas Electronics America, R5F21266SNFP#U0 Datasheet - Page 157
![IC R8C/26 MCU FLASH 32LQFP](/photos/12/37/123707/r5f21266snfp_u0_sml.jpg)
R5F21266SNFP#U0
Manufacturer Part Number
R5F21266SNFP#U0
Description
IC R8C/26 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/26r
Datasheet
1.R5F21272SDFPU0.pdf
(487 pages)
Specifications of R5F21266SNFP#U0
Core Size
16/32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
R8C
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
2.2V To 5.5V
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (5Mb)
R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 13.3
Watchdog Timer Reset Register
Watchdog Timer Start Register
Count Source Protection Mode Register
b7
NOTES:
b7
b7 b6 b5 b4 b3 b2 b1 b0
NOTES:
1.
2.
1.
2.
0 0 0
Do not generate an interrupt betw een w hen 00h and FFh are w ritten.
When the CSPRO bit in the CSPR register is set to 1 (count source protection mode enabled),
0FFFh is set in the w atchdog timer.
When 0 is w ritten to the CSPROINI bit in the OFS register, the value after reset is 10000000b.
Write 0 before w riting 1 to set the CSPRO bit to 1.
0 cannot be set by a program.
Sep 26, 2008
0
0
Registers WDTR, WDTS, and CSPR
0
b0
b0
0
When 00h is w ritten before w riting FFh, the w atchdog timer is reset.
The default value of the w atchdog timer is 7FFFh w hen count source protection
mode is disabled and 0FFFh w hen count source protection mode is enabled.
The w atchdog timer starts counting after a w rite instruction to this register.
Bit Symbol
(b6-b0)
CSPRO
Symbol
Symbol
Symbol
WDTR
WDTS
CSPR
Page 138 of 453
—
Reserved Bits
Count Source Protection Mode
Select Bit
Address
Address
000Dh
000Eh
(2)
Address
Bit Name
001Ch
Function
Function
Set to 0.
0 : Count source protection mode disabled
1 : Count source protection mode enabled
After Reset
After Reset
Undefined
Undefined
After Reset
Function
00h
(1)
(1)
(2)
13. Watchdog Timer
WO
WO
RW
RW
RW
RW
RW
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