R5F21266SNFP#U0 Renesas Electronics America, R5F21266SNFP#U0 Datasheet - Page 449
R5F21266SNFP#U0
Manufacturer Part Number
R5F21266SNFP#U0
Description
IC R8C/26 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/26r
Datasheet
1.R5F21272SDFPU0.pdf
(487 pages)
Specifications of R5F21266SNFP#U0
Core Size
16/32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
R8C
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
2.2V To 5.5V
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
21.2.5
Sample programs 1 to 3 are for preventing the I flag from being set to 1 (interrupts enabled) before the interrupt
control register is changed for reasons of the internal bus or the instruction queue buffer.
Example 1:
Example 2:
Example 3:
(a) The contents of an interrupt control register can only be changed while no interrupt requests
(b) When changing the contents of an interrupt control register after disabling interrupts, be careful to
(c) When disabling interrupts using the I flag, set the I flag as shown in the sample programs below. Refer
INT_SWITCH1:
INT_SWITCH2:
INT_SWITCH3:
Sep 26, 2008
Changing Interrupt Control Register Contents
corresponding to that register are generated. If interrupt requests may be generated, disable interrupts
before changing the interrupt control register contents.
choose appropriate instructions.
Changing any bit other than IR bit
If an interrupt request corresponding to a register is generated while executing the instruction, the IR bit
may not be set to 1 (interrupt requested), and the interrupt request may be ignored. If this causes a
problem, use the following instructions to change the register: AND, OR, BCLR, BSET
Changing IR bit
If the IR bit is set to 0 (interrupt not requested), it may not be set to 0 depending on the instruction used.
Therefore, use the MOV instruction to set the IR bit to 0.
to (b) regarding changing the contents of interrupt control registers by the sample programs.
FCLR
AND.B
NOP
NOP
FSET
FCLR
AND.B
MOV.W MEM,R0
FSET
PUSHC FLG
FCLR
AND.B
POPC
Use NOP instructions to prevent I flag from being set to 1 before interrupt control register
is changed
Use dummy read to delay FSET instruction
Use POPC instruction to change I flag
I
I
I
#00H,0056H
I
#00H,0056H
I
#00H,0056H
FLG
Page 430 of 453
; Disable interrupts
;
; Enable interrupts
; Disable interrupts
; Dummy read
; Enable interrupts
; Disable interrupts
; Enable interrupts
; Set TRAIC register to 00h
; Set TRAIC register to 00h
; Set TRAIC register to 00h
21. Usage Notes
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