R5F21266SNFP#U0 Renesas Electronics America, R5F21266SNFP#U0 Datasheet - Page 233
![IC R8C/26 MCU FLASH 32LQFP](/photos/12/37/123707/r5f21266snfp_u0_sml.jpg)
R5F21266SNFP#U0
Manufacturer Part Number
R5F21266SNFP#U0
Description
IC R8C/26 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/26r
Datasheet
1.R5F21272SDFPU0.pdf
(487 pages)
Specifications of R5F21266SNFP#U0
Core Size
16/32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
R8C
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
2.2V To 5.5V
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 14.54
Sep 26, 2008
TRCGRB register
TRCGRB register
TRCMR register
TRCMR register
TRCSR register
TRCSR register
TRCSR register
TRCSR register
TRCIOB output
TRCIOB output
Operating Example of PWM Mode (Duty 0% and Duty 100%)
TSTART bit in
TSTART bit in
IMFA bit in
IMFB bit in
IMFA bit in
IMFB bit in
TRC register value
TRC register value
0000h
0000h
Page 214 of 453
The above applies under the following conditions:
• The EB bit in the TRCOER register is set to 0 (output from TRCIOB enabled).
• The TOB bit in the TRCCR1 register is set to 1 (active level is “L”).
1
0
1
0
1
0
1
0
1
0
1
0
p
m
q
n
m
p
n
n
n
Rewritten by
a program
Set to 0 by a program
m
Set to 0 by a program
Rewritten by a program
If compare matches occur simultaneously with registers TRCGRA and
TRCGRB, the compare match with the TRCGRB register has priority.
TRCIOB output switches to “L”. (In other words, no change).
p (p>m)
Duty 100%
Duty 0%
TRCIOB output switches to “L” at compare match with the
TRCGRB register. (In other words, no change).
m: TRCGRA register setting value
p
TRCIOB output does not switch to “L” because
no compare match with the TRCGRB register
has occurred
Set to 0 by a program
Set to 0 by a program
q
14. Timers
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