R5F21266SNFP#U0 Renesas Electronics America, R5F21266SNFP#U0 Datasheet - Page 281

IC R8C/26 MCU FLASH 32LQFP

R5F21266SNFP#U0

Manufacturer Part Number
R5F21266SNFP#U0
Description
IC R8C/26 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/26r
Datasheet

Specifications of R5F21266SNFP#U0

Core Size
16/32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
R8C
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
2.2V To 5.5V
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F21266SNFP#U0
Manufacturer:
Renesas Electronics America
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Part Number:
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Quantity:
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Part Number:
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Manufacturer:
Renesas Electronics America
Quantity:
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Part Number:
R5F21266SNFP#U0R5F21266SNFP#V2
Manufacturer:
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Part Number:
R5F21266SNFP#U0R5F21266SNFP#X6
Manufacturer:
Renesas Electronics America
Quantity:
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 16.2
SS Control Register H
b7 b6 b5 b4 b3 b2 b1 b0
NOTES:
1.
2.
3.
The set clock is used w hen the internal clock is selected.
The SSCK pin functions as the transfer clock output pin w hen the MSS bit is set to 1 (operates as master device).
The MSS bit is set to 0 (operates as slave device) w hen the CE bit in the SSSR register is set to 1 (conflict error
occurs).
The RSSTP bit is disabled w hen the MSS bit is set to 0 (operates as slave device).
Sep 26, 2008
SSCRH Register
Bit Symbol
(b4-b3)
Symbol
SSCRH
RSSTP
CKS0
CKS1
CKS2
MSS
(b7)
Page 262 of 453
Transfer clock rate select bits
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Master/slave device select bit
Receive single stop bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Address
Bit Name
00B8h
(3)
(2)
(1)
0 : Operates as slave device
1 : Operates as master device
0 : Maintains receive operation after
1 : Completes receive operation after
b2 b1 b0
0 0 0 : f1/256
0 0 1 : f1/128
0 1 0 : f1/64
0 1 1 : f1/32
1 0 0 : f1/16
1 0 1 : f1/8
1 1 0 : f1/4
1 1 1 : Do not set.
receiving 1 byte of data
receiving 1 byte of data
16. Clock Synchronous Serial Interface
After Reset
Function
00h
RW
RW
RW
RW
RW
RW

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