R5F21266SNFP#U0 Renesas Electronics America, R5F21266SNFP#U0 Datasheet - Page 353
![IC R8C/26 MCU FLASH 32LQFP](/photos/12/37/123707/r5f21266snfp_u0_sml.jpg)
R5F21266SNFP#U0
Manufacturer Part Number
R5F21266SNFP#U0
Description
IC R8C/26 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/26r
Datasheet
1.R5F21272SDFPU0.pdf
(487 pages)
Specifications of R5F21266SNFP#U0
Core Size
16/32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
R8C
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
2.2V To 5.5V
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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Price
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
Figure 17.11
17.4.3
IR bit in the TRAIC
TE bit in the U0C1
The bus collision detection function can be used when UART0 is enabled for transmission (TE bit in the U0C1
register = 1).
Figure 17.11 shows the Typical Operation when a Bus Collision is Detected.
BCDCT flag in the
LINCR register
LINST register
Sep 26, 2008
Transfer clock
LINE bit in the
Bus Collision Detection Function
RXD0 pin
TXD0 pin
register
register
Typical Operation when a Bus Collision is Detected
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Page 334 of 453
Set to 1 by a program
Set to 1 by a program
Cleared to 0 upon
acceptance of interrupt
request or by a program
Set by writing 1 to
the B2CLR bit in the
LINST register
17. Hardware LIN
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