R5F21266SNFP#U0 Renesas Electronics America, R5F21266SNFP#U0 Datasheet - Page 378
![IC R8C/26 MCU FLASH 32LQFP](/photos/12/37/123707/r5f21266snfp_u0_sml.jpg)
R5F21266SNFP#U0
Manufacturer Part Number
R5F21266SNFP#U0
Description
IC R8C/26 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/26r
Datasheet
1.R5F21272SDFPU0.pdf
(487 pages)
Specifications of R5F21266SNFP#U0
Core Size
16/32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
R8C
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
2.2V To 5.5V
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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Price
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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
19.4.2.1
19.4.2.2
19.4.2.3
19.4.2.4
19.4.2.5
19.4.2.6
19.4.2.7
19.4.2.8
19.4.2.9
Figure 19.5 shows the FMR0 Register, Figure 19.6 shows the FMR1 Register and Figure 19.7 shows the FMR4
Register.
This bit indicates the operating status of the flash memory. The bits value is 0 during programming, erasure
(including suspend periods), or erase-suspend mode; otherwise, it is 1.
The MCU is made ready to accept commands by setting the FMR01 bit to 1 (CPU rewrite mode).
Rewriting of block 0 and block 1 does not accept program or block erase commands if the FMR02 bit is set to 0
(rewrite disabled).
Rewriting of block 0 and block 1 is controlled by bits FMR15 and FMR16 if the FMR02 bit is set to 1 (rewrite
enabled).
This bit is used to initialize the flash memory control circuits, and also to reduce the amount of current
consumed by the flash memory. Access to the flash memory is disabled by setting the FMSTP bit to 1.
Therefore, the FMSTP bit must be written to by a program transferred to the RAM.
In the following cases, set the FMSTP bit to 1:
Figure 19.11 shows the Process to Reduce Power Consumption in High-Speed On-Chip Oscillator Mode, Low-
Speed On-Chip Oscillator Mode (XIN Clock Stops) and Low-Speed Clock Mode (XIN Clock Stops). Handle
according to this flowchart. Note that when going to stop or wait mode while the CPU rewrite mode is disabled,
the FMR0 register does not need to be set because the power for the flash memory is automatically turned off
and is turned back on again after returning from stop or wait mode.
This is a read-only bit indicating the status of an auto-program operation. The bit is set to 1 when a program
error occurs; otherwise, it is cleared to 0. For details, refer to the description in 19.4.5 Full Status Check.
This is a read-only bit indicating the status of an auto-erase operation. The bit is set to 1 when an erase error
occurs; otherwise, it is set to 0. Refer to 19.4.5 Full Status Check for details.
Setting this bit to 1 (EW1 mode) places the MCU in EW1 mode.
When the FMR02 bit is set to 1 (rewrite enabled) and the FMR15 bit is set to 0 (rewrite enabled), block 0
accepts program and block erase commands.
When the FMR02 bit is set to 1 (rewrite enabled) and the FMR16 bit is set to 0 (rewrite enabled), block 1
accepts program and block erase commands.
• When flash memory access resulted in an error while erasing or programming in EW0 mode (FMR00 bit
• To provide lower consumption in high-speed on-chip oscillator mode, low-speed on-chip oscillator mode
Sep 26, 2008
not reset to 1 (ready))
(XIN clock stops), and low-speed clock mode (XIN clock stops).
FMR00 Bit
FMR01 Bit
FMR02 Bit
FMSTP Bit
FMR06 Bit
FMR07 Bit
FMR11 Bit
FMR15 Bit
FMR16 Bit
Page 359 of 453
19. Flash Memory
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